鈥?/div>
8051 core, 12MHz operating frequency.
1024-byte RAM; 64K-byte program Flash-ROM support In System Programming(ISP).
Maximum 14 channels of 5V open-drain PWM DAC.
Maximum 32 bi-directional I/O pins.
SYNC processor for composite separation/insertion, H/V polarity/frequency check, polarity adjustment
and programmable clamp pulse output.
Built-in self-test pattern generator with four free-running timings.
Built-in low power reset circuit.
Compliant with VESA DDC1/2B/2Bi/2B+ standard.
Dual slave IIC addresses.
Single master IIC interface for internal device communication.
4-channel 6-bit ADC.
Watchdog timer with programmable intervals.
40-pin DIP, 42-pin SDIP or 44-pin PLCC package.
GENERAL DESCRIPTIONS
The MTV212M64i micro-controller is an 8051 CPU core embedded device especially tailored to Monitor
applications. It includes an 8051 CPU core, 1024-byte SRAM, SYNC processor, 14 built-in PWM DACs,
VESA DDC interface, 4-channel A/D converter and a 64K-byte internal program Flash-ROM.
BLOCK DIAGRAM
P0.0-
7
RD
WR
ALE
INT1
P1.0-7
P2.0-2,P2.4-7
P3.2-0
P3.4-5
RST
X1
X2
P0.0-
7
RD
WR
ALE
INT1
XFR
H/VSYNC
CONTROL
STOUT
HBLANK
VBLANK
HSYNC
VSYNC
HCLAMP
HALFV
HALFH
8051
AD0-2
ADC
14 CHANNEL
PWM DAC
ISCL
ISDA
HSCL
HSDA
DDC & IIC
INTERFACE
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without
notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Revision 0.9
-1-
2000/11/16