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MTD10N10EL_06 Datasheet

  • MTD10N10EL_06

  • TMOS E−FET Power Field Effect Transistor DPAK for Surf...

  • 7頁

  • ONSEMI

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MTD10N10EL
TMOS E鈭扚ET鈩?/div>
Power Field Effect Transistor
DPAK for Surface Mount
N鈭扖hannel Enhancement鈭扢ode Silicon
Gate
This advanced TMOS E鈭扚ET is designed to withstand high energy
in the avalanche and commutation modes. The new energy efficient
design also offers a drain鈭抰o鈭抯ource diode with a fast recovery time.
Designed for low voltage, high speed switching applications in power
supplies, converters and PWM motor controls, these devices are
particularly well suited for bridge circuits where diode speed and
commutating safe operating areas are critical and offer additional
safety margin against unexpected voltage transients.
Features
V
DSS
100 V
http://onsemi.com
R
DS(ON)
TYP
0.22
W
I
D
MAX
10 A
N鈭扖hannel
D
鈥?/div>
Avalanche Energy Specified
鈥?/div>
Source鈭抰o鈭扗rain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
鈥?/div>
Diode is Characterized for Use in Bridge Circuits
鈥?/div>
I
DSS
and V
DS(on)
Specified at Elevated Temperature
鈥?/div>
Pb鈭扚ree Package is Available
MAXIMUM RATINGS
(T
C
= 25擄C unless otherwise noted)
Parameter
Drain鈭抰o鈭扴ource Voltage
Drain鈭抰o鈭扜ate Voltage (R
GS
= 1.0 MW)
Gate鈭抰o鈭扴ource Voltage 鈭?Continuous
Non鈭扲epetitive (t
p
鈮?/div>
10 ms)
Drain Current
鈭?Continuous
鈭?Continuous @ 100擄C
鈭?Single Pulse (t
p
鈮?/div>
10
ms)
Symbol
V
DSS
V
DGR
V
GS
V
GSM
I
D
I
D
I
DM
P
D
Value
100
100
鹵15
鹵20
10
6.0
35
40
0.32
1.75
鈭?5 to
150
50
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
W
W/擄C
W
擄C
mJ
1 2
3
G
S
MARKING DIAGRAM & PIN ASSIGNMENTS
4
Gate 1
Drain 2
YWW
10N
10ELG
4
Drain
DPAK
Source 3
CASE 369C
(Surface Mount)
STYLE 2
Total Power Dissipation @ T
C
= 25擄C
Derate above 25擄C
Total Power Dissipation @ T
A
= 25擄C (Note 2)
Operating and Storage Temperature Range
Single Pulse Drain鈭抰o鈭扴ource Avalanche
Energy 鈭?Starting T
J
= 25擄C
(V
DD
= 25 Vdc, V
GS
= 5.0 Vdc, I
L
= 10 Apk,
L = 1.0 mH, R
G
= 25
W)
Thermal Resistance
鈭?Junction鈭抰o鈭扖ase
鈭?Junction鈭抰o鈭扐mbient (Note 1)
鈭?Junction鈭抰o鈭扐mbient (Note 2)
Maximum Temperature for Soldering
Purposes, 1/8鈥?from case for 10 sec
T
J
, T
stg
E
AS
10N10EL
Y
WW
G
= Device Code
= Year
= Work Week
= Pb鈭扚ree Package
ORDERING INFORMATION
擄C/W
R
胃JC
R
胃JA
R
胃JA
T
L
3.13
100
71.4
260
擄C
Device
MTD10N10ELT4
MTD10N10ELT4G
Package
DPAK
DPAK
(Pb鈭扚ree)
Shipping
鈥?/div>
2500 Tape & Reel
2500 Tape & Reel
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using minimum recommended pad
size.
2. When surface mounted to an FR4 board using 0.5 sq in pad size.
鈥燜or information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
漏
Semiconductor Components Industries, LLC, 2006
1
June, 2006 鈭?Rev. 3
Publication Order Number:
MTD10N10EL/D

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