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MTB3N120E Datasheet

  • MTB3N120E

  • TMOS POWER FET 3.0 AMPERES 1200 VOLTS

  • 12頁

  • MOTOROLA   MOTOROLA

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTB3N120E/D
鈩?/div>
Data Sheet
TMOS E-FET.
鈩?/div>
High Energy Power FET
D2PAK for Surface Mount
Designer's
MTB3N120E
Motorola Preferred Device
N鈥揅hannel Enhancement鈥揗ode Silicon Gate
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
in applications that require the use of surface mount components
with higher power and lower RDS(on) capabilities. This high voltage
MOSFET uses an advanced termination scheme to provide
enhanced voltage鈥揵locking capability without degrading perfor-
mance over time. In addition, this advanced TMOS E鈥揊ET is
designed to withstand high energy in the avalanche and commuta-
tion modes. This new energy efficient design also offers a
drain鈥搕o鈥搒ource diode with a fast recovery time. Designed for low
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
TMOS POWER FET
3.0 AMPERES
1200 VOLTS
RDS(on) = 5.0 OHM
廬
D
G
鈥?/div>
Avalanche Energy Capability Specified at Elevated Temperature
S
鈥?/div>
Low Stored Gate Charge for Efficient Switching
鈥?/div>
Internal Source鈥搕o鈥揇rain Diode Designed to Replace External Zener Transient Suppressor Absorbs High Energy in the
Avalanche Mode
鈥?/div>
Source鈥搕o鈥揇rain Diode Recovery time Comparable to Discrete Fast Recovery Diode
* See App. Note AN1327 鈥?Very Wide Input Voltage Range; Off鈥搇ine Flyback Switching Power Supply
MAXIMUM RATINGS
(TC = 25擄C unless otherwise noted)
Rating
Drain鈥揝ource Voltage
Drain鈥揋ate Voltage (RGS = 1.0 M鈩?
Gate鈥揝ource Voltage 鈥?Continuous
Gate鈥揝ource Voltage
鈥?Non鈥揜epetitive (tp
鈮?/div>
10 ms)
Drain Current 鈥?Continuous @ 25擄C
Drain Current
鈥?Continuous @ 100擄C
Drain Current
鈥?Single Pulse (tp
鈮?/div>
10
碌s)
Total Power Dissipation @ TC = 25擄C
Derate above 25擄C
Total Power Dissipation @ TA = 25擄C (1)
Operating and Storage Temperature Range
Single Pulse Drain鈥搕o鈥揝ource Avalanche Energy 鈥?Starting TJ = 25擄C
(VDD = 100 Vdc, VGS = 10 Vdc, PEAK IL = 4.5 Apk, L = 10 mH, RG = 25
鈩?
Thermal Resistance 鈥?Junction to Case
Thermal Resistance
鈥?Junction to Ambient
Thermal Resistance
鈥?Junction to Ambient (1)
Maximum Lead Temperature for Soldering Purposes, 1/8鈥?from case for 10 seconds
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
E鈥揊ET and Designer鈥檚 are trademarks of Motorola, Inc.
TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred
devices are Motorola recommended choices for future use and best overall value.
REV 1
CASE 418B鈥?2, Style 2
D2PAK
Symbol
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
Value
1200
1200
鹵
20
鹵
40
3.0
2.2
11
125
1.0
2.5
鈥?55 to 150
101
1.0
62.5
50
260
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/擄C
Watts
擄C
mJ
擄C/W
TJ, Tstg
EAS
R
胃JC
R
胃JA
R
胃JA
TL
擄C
漏
Motorola, Inc. 1995
Motorola TMOS Power MOSFET Transistor Device Data
1

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