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Framer for CCITT Recommendations
- G.742 (8448 kbit/s)
- G.745 (8448 kbit/s)
- G.751 (34368 kbit/s)
- G.753 (34368 kbit/s)
Line side interface
- Dual rail or NRZ
HDB3 codec for dual rail I/O
Terminal side interface
- Nibble-parallel
- Bit-serial
Transmit reference generator for bit-serial I/O
Microprocessor or control leads
I/O port for service bits
ISSUE 1
May 1995
Ordering Information
MT90732AP
68 Pin PLCC
-40擄C to +85擄C
Description
The MT90732 E2/E3 Framer (E2/E3F) is a CMOS
VLSI device that provides the functions needed to
frame a wideband payload to one of four CCITT
Recommendations. G.742, G.745, G.751, or G.753.
The E2/E3 Framer interfaces to line circuitry with
either dual rail or NRZ signals. On the terminal side,
the interface can be either nibble-parallel or bit-
serial.
The MT90732 can be operated with or without a
microprocessor.
When
interfaced
with
a
microprocessor, the E2/E3 Framer provides an 8-
byte memory map for control, performance counters
and alarm status. The MT90732 provides a transmit
and receive interface port for accessing the
overhead
bits
from
each
of
the
four
recommendations. The overhead bits can also be
accessed by the microprocessor via the memory
map.
SERIAL
PARALLEL
RNIB3
RNIB2
RNIB1
RNIB0
RNC
RNF
N.C.
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Applications
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Line terminals
Wideband data or video transport
Test equipment
Multiplexer systems
RDL
RCKL
RP/RDL
RN
RCK/RCKL
CV
RAIS
RLOC
BIP-4E
RLOF
ROD
ROC
ROF
FE
NRZ LINE
BIP-4
M0
M1
MICRO
SER
DAIS
TLBK
PLBK
TAIS
LPT
TLCINV
TLOC
FORCEFE
TOD
TOC
TOF
RESET
TP/TDL
TCK/TCKL
Line Side
TN
Data
Line
Decoder
Clock
Framer
Data
Clock
Frame
Interpreter
Data
Clock
Frame
Output
RSD
TDOUT
TCG
TFOUT
RSC
RSF
RCG
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
SEL
ALE
RD
WR
RDY
Micro-
processor
I/O
Control
Transmit
Reference
Generator
XSF
N.C.
TCIN
XSD
XCK
N.C.
TCOUT
XNIB3
XNIB2
XNIB1
XNIB0
XCK
XNF
XNC
TCKL
TDL
Line
Encoder
Data
Clock
G.7XX
Send
Clock
Data
Framing
Input
Terminal Side
U.S. Patent Number 5040170
Figure 1 - Functional Block Diagram
5-15
MT90732AP相關(guān)型號PDF文件下載
-
型號
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廠商
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