MT8931CP Datasheet

IC型號：
MT8931CP
PDF描述：
Subscriber Network Interface Circuit
文件大?。?/label>
836.23KB
PDF頁數(shù)：
39頁
芯片廠家：
ZARLINK

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MT8931C

CMOS ST-BUS錚?FAMILY

Subscriber Network Interface Circuit

Data Sheet

Features

鈥?/div>

ETS 300-012, CCITT I.430 and ANSI T1.605

S/T interface

Full-duplex 2B+D, 192 kbit/s transmission

Link activation/deactivation

D-channel access contention resolution

Point-to-point, point-to-multipoint and star

configurations

Master (NT)/Slave (TE) modes of operation

Exceeds loop length requirements

Complete loopback testing capabilities

On chip HDLC D-channel protocoller

8 bit Motorola/Intel microprocessor interface

Microprocessor-controlled operation

Zarlink ST-BUS interface

Low power CMOS technology

Single 5 volt power supply

The MT8931C Subscriber Network Interface Circuit

(SNIC) implements the ETSI ETS 300-012, CCITT

I.430 and ANSI T1.605 Recommendations for the

ISDN S and T reference points. Providing point-to-

point and point-to-multipoint digital transmission, the

SNIC may be used at either end of the subscriber

line (NT or TE).

An HDLC D-channel protocoller is included and

controlled through a Motorola/Intel microprocessor

port.

The MT8931C is fabricated in Zarlink鈥檚 CMOS

process.

ISSUE 4

November 1997

Ordering Information

MT8931CE

28 Pin Plastic DIP

MT8931CP

44 Pin PLCC

-40擄C to +85擄C

Description

Applications

鈥?/div>

ISDN NT1

ISDN S or T interface

ISDN Terminal Adaptor (TA)

Digital sets (TE1) - 4 wire ISDN interface

Digital PABXs, Digital Line Cards (NT2)

DSTi

DSTo

ST-BUS

Interface

D-channel Priority

Mechanism

LTx

S-Bus

Link

Interface

VBias

LRx

F0od

C4b

F0b

STAR/Rsto

XTAL1/NT

XTAL2/NC

Timing

and

Control

PLL

HDLC

Transceiver

Link

Activation

Controller

VDD

Microprocessor Interface

VSS

Rsti

HALF

AD0-7

R/W/WR

DS/RD

AS/ALE

IRQ/NDA

Figure 1 - Functional Block Diagram

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