Advance鈥?/div>
128Mb: 8 Meg x 16 Mobile DDR SDRAM
Mobile Double Data Rate (DDR) SDRAM
MT46H8M16LF 鈥?2 Meg x 16 x 4 Banks
For a complete data sheet, please refer to
www.micron.com/mobileds.
Features
鈥?V
DD
= +1.8V 鹵0.1V, V
DD
Q = +1.8V 鹵0.1V
鈥?Bidirectional data strobe per byte of data (DQS)
鈥?Internal, pipelined double data rate (DDR)
architecture; two data accesses per clock cycle
鈥?Differential clock inputs (CK and CK#)
鈥?Commands entered on each positive CK edge
鈥?DQS edge-aligned with data for READs; center-
aligned with data for WRITEs
鈥?Four internal banks for concurrent operation
鈥?Data masks (DM) for masking write data鈥搊ne mask
per byte
鈥?Programmable burst lengths: 2, 4, or 8
鈥?Concurrent auto precharge option is supported
鈥?Auto refresh and self refresh modes
鈥?1.8V LVCMOS compatible inputs
鈥?On-chip temperature sensor to control refresh rate
鈥?Partial array self refresh (PASR)
鈥?Selectable output drive (DS)
鈥?Clock stop capability
Figure 1: 60-Ball VFBGA Assignment
(Top View)
1
A
V
SS
DQ15
V
SS
Q
V
DD
Q
DQ0
V
DD
2
3
4
5
6
7
8
9
B
V
DD
Q
DQ13
DQ14
DQ1
DQ2
V
SS
Q
C
V
SS
Q
DQ11
DQ12
DQ3
DQ4
V
DD
Q
D
V
DD
Q
DQ9
DQ10
DQ5
DQ6
V
SS
Q
E
V
SS
Q
UDQS
DQ8
DQ7
LDQS
V
DD
Q
F
V
SS
UDM
NC
NC
LDM
V
DD
G
CKE
CK
CK#
WE#
CAS#
RAS#
H
A9
A11
A12/NC
CS#
BA0
BA1
J
A6
A7
A8
A10/AP
A0
A1
Options
鈥?V
DD
/V
DD
Q
鈥?1.8V/1.8V
鈥?Configuration
鈥?8 Meg x 16 (2 Meg x 16 x 4 banks)
鈥?Plastic Package
鈥?60-Ball VFBGA (Lead-Free)
8mm x 10mm
鈥?Timing 鈥?Cycle Time
鈥?7.5ns @ CL = 3
鈥?10ns @ CL = 3
鈥?Operating Temperature Range
鈥?Commercial (0擄 to +70擄C)
鈥?Industrial (-40擄C to +85擄C)
Marking
H
8M16
CF
K
V
SS
A4
A5
A2
A3
V
DD
Table 1:
Configuration Addressing
8 Meg x 16
2 Meg x 16 x 4
4K
4K (A0鈥揂11)
4 (BA0, BA1)
1K (A0鈥揂9)
Architecture
Configuration
Refresh Count
Row Addressing
Bank Addressing
Column Addressing
-6
-10
None
IT
Table 2:
Speed
Grade
Key Timing Parameters
Clock Rate
CL = 3
CL = 2
Data-Out
Window
Access
Time
DQS-DQ
Skew
-75
-10
-75
-10
PDF: 09005aef818ff781/Source: 09005aef818ff799
MT46H8M16.fm - Rev. A 03/05 EN
133 MHz
104 MHz
-
-
-
83 MHz
67 MHz
2ns
2.8ns
4ns
5ns
6.0s
7.0ns
6.5ns
7.0ns
+0.6ns
+0.7ns
+0.6ns
+0.7ns
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
漏2005 Micron Technology, Inc. All rights reserved.
鈥roducts and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron
to meet Micron鈥檚 production data sheet specifications.
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