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MT28C3214P2NFL Datasheet

  • MT28C3214P2NFL

  • FLASH AND SRAM COMBO MEMORY

  • 42頁

  • MICRON

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2 MEG x 16 PAGE FLASH
256K x 16 SRAM COMBO MEMORY
FLASH AND SRAM
COMBO MEMORY
FEATURES
鈥?Flexible dual-bank architecture
鈥?Support for true concurrent operations with no
latency:
Read bank
b
during program bank
a
and vice versa
Read bank
b
during erase bank
a
and vice versa
鈥?Organization: 2,048K x 16 (Flash)
256K x 16 (SRAM)
鈥?Basic configuration:
Flash
Bank
a
(4Mb Flash for data storage)
鈥?Eight 4K-word parameter blocks
鈥?Seven 32K-word blocks
Bank
b
(28Mb Flash for program storage)
鈥?Fifty-six 32K-word main blocks
SRAM
4Mb SRAM for data storage
鈥?256K-words
鈥?F_V
CC
, V
CC
Q, F_V
PP
, S_V
CC
voltages
1
1.65V (MIN)/1.95V (MAX) F_V
CC
read voltage or
1.80V (MIN)/2.20V (MAX) F_V
CC
read voltage
1.65V (MIN)/1.95V (MAX) S_V
CC
read voltage or
1.80V (MIN)/2.20V (MAX) S_V
CC
read voltage
1.65V (MIN)/1.95V (MAX) V
CC
Q or
1.80V (MIN)/2.20V (MAX) V
CC
Q
1.80V (TYP) F_V
PP
(in-system PROGRAM/ERASE)
0.0V (MIN)/2.20V (MAX) F_V
PP
(in-system
PROGRAM/ERASE)
2
12V 鹵5% (HV) F_V
PP
(production programming
compatibility)
鈥?Asynchronous access time
1
Flash access time: 100ns or 110ns @ 1.65V F_V
CC
SRAM access time: 100ns @ 1.65V S_V
CC
鈥?Page Mode read access
1
Interpage read access: 100ns/110ns @ 1.65V F_V
CC
Intrapage read access: 35ns/45ns @ 1.65V F_V
CC
鈥?Low power consumption
鈥?Enhanced suspend options
ERASE-SUSPEND-to-READ within same bank
PROGRAM-SUSPEND-to-READ within same bank
ERASE-SUSPEND-to-PROGRAM within same bank
鈥?Read/Write SRAM during program/erase of Flash
鈥?Dual 64-bit chip protection registers for security
purposes
鈥?PROGRAM/ERASE cycles
100,000 WRITE/ERASE cycles per block
MT28C3214P2FL
MT28C3214P2NFL
Low Voltage, Extended Temperature
BALL ASSIGNMENT
66-Ball FBGA (Top View)
1
A
B
C
D
E
F
G
H
NC
NC
NC
2
NC
3
A20
4
A11
5
A15
6
A14
7
A13
8
A12
9
F_V
SS
10
V
cc
Q
11
NC
12
NC
A16
A8
A10
A9
DQ15
S_WE#
DQ14
DQ7
F_WE#
NC
DQ13
DQ6
DQ4
DQ5
S_V
SS
F_RP#
DQ12
S_CE2
S_V
CC
F_V
CC
F_WP#
F_V
PP
A19
DQ11
DQ10
DQ2
DQ3
S_LB#
S_UB#
S_OE#
DQ9
DQ8
DQ0
DQ1
A18
A17
A7
A6
A3
A2
A1
S_CE1#
F_V
CC
A5
A4
A0
F_CE#
F_V
SS
F_OE#
NC
NC
NC
Top View
(Ball Down)
鈥?Cross-compatible command set support
Extended command set
Common flash interface (CFI) compliant
NOTE:
1. These specifications are guaranteed for operation
within either one of two voltage ranges, 1.65V鈥?.95V
or 1.80V鈥?.20V. Use only one of the two voltage
ranges for PROGRAM and ERASE operations.
2. MT28C3214P2NFL only.
OPTIONS
MARKING
鈥?Timing
100ns
-10
110ns
-11
鈥?Boot Block
Top
T
Bottom
B
鈥?V
PP
1
Range
0.9V鈥?.2V
None
0.0V鈥?.2V
N
鈥?Operating Temperature Range
Commercial Temperature (0
o
C to +70
o
C) None
Extended Temperature (-40
o
C to +85
o
C) ET
鈥?Package
66-ball FBGA (8 x 8 grid)
FL
Part Number Example:
MT28C3214P2FL-10 TET
2 Meg x 16 Page Flash 256K x 16 SRAM Combo Memory
MT28C3214P2FL_4.p65 鈥?Rev. 4, Pub. 4/02
1
漏2002, Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.

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