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MSM54V25632A Datasheet

  • MSM54V25632A

  • 131,072-Word x 32-Bit x 2-Bank Synchronous Graphics RAM

  • 850.90KB

  • 67頁

  • OKI

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E2L0068-19-61
隆 Semiconductor
隆 Semiconductor
MSM54V25632A
DESCRIPTION
This version: Jun. 1999
MSM54V25632A
Previous version: Sep. 1998
131,072-Word
樓
32-Bit
樓
2-Bank Synchronous Graphics RAM
The MSM54V25632A is a synchronous graphics random access memory organized as 128 K words
樓
32 bits
樓
2 banks.
This device can operate up to 100 MHz by using synchronous interface. In addition, it has 8-column
Block Write function and Write per bit function which improves performance in graphics
systems.
FEATURES
鈥?131,072 words
樓
32 bits
樓
2 banks memory
鈥?Single 3.3 V
鹵0.3
V power supply
鈥?LVTTL compatible inputs and outputs
鈥?All input signals are latched at rising edge of system clock
鈥?Auto precharge and controlled precharge
鈥?Internal pipelined operation: column address can be changed every clock cycle
鈥?Dual internal banks controlled by A9 (Bank Address: BA)
鈥?Independent byte operation via DQM0 to DQM3
鈥?8-column Block Write function
鈥?Persistent write per bit function
鈥?Programmable burst sequence (Sequential/Interleave)
鈥?Programmable burst length (1, 2, 4, 8 and full page)
鈥?Programmable
CAS
latency (1, 2 and 3)
鈥?Burst stop function (full-page burst)
鈥?Power Down operation and Clock Suspend operation
鈥?Auto refresh and self refresh capability
鈥?1,024 refresh cycles/16 ms
鈥?Package:
100-pin plastic QFP
(QFP100-P-1420-0.65-BK4)
(Product : MSM54V25632A-xxAGBK4)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM54V25632A-10
MSM54V25632A-12
Clock Frequency
MHz (Max.)
100
83
Package
100-pin Plastic QFP (14
樓
20 mm)
1/66

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