鈥?/div>
LVPECL or LVCMOS/LVTTL Clock Input
2.5V LVCMOS Outputs for Pentium II Microprocessor Support
150ps Maximum Targeted Output鈥搕o鈥揙utput Skew
Maximum Output Frequency of 250MHz
32鈥揕ead TQFP Packaging
Dual VCC Supply Voltage, 3.3V Core and 2.5V Output
FA SUFFIX
32鈥揕EAD TQFP PACKAGE
CASE 873A鈥?2
With a low output impedance (鈮?0鈩?, in both the HIGH and LOW logic
states, the output buffers of the MPC940L are ideal for driving series
terminated transmission lines. With this drive capability, the MPC940L
provides enough copies of low skew clocks for most high performance
synchronous systems.
The differential LVPECL inputs of the MPC940L allow the device to interface directly with a LVPECL fanout buffer like the
MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input
provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In
addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH
on the LVCMOS_CLK_Sel pin will select the TTL level clock input.
The MPC940L is a dual supply device. The core VCC power pins (VCCI) require 3.3V with the output VCC pins (VCCO)
requiring 2.5V. The 32鈥搇ead TQFP package was chosen to optimize performance, board space and cost of the device. The
32鈥搇ead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
Pentium II is a trademark of Intel Corporation.
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
10/97
漏
Motorola, Inc. 1997
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