MN102H85K
Type
ROM (脳 16-bit)
脳
RAM (脳 16-bit)
脳
Package
(Conventional Package)
Minimum Instruction
Execution Time
Interrupts
MN102H85K
256 K
8K
SDIP064-P-0750C
*Lead-free
(SDIP064-P-0750)
83 ns (at 3.0 V to 3.6 V, 12 MHz)
External (6 lines)
Internal (30 lines) : Timer
脳
11, A/D
脳
1, Undefined command
脳
1, RESET
脳
1, OSD
脳
2, Serial
脳
4,
I
2
C
脳
1, Caption
脳
4, Remote control
脳
1, Address coincidence
脳
4
8-bit timer
脳
4
16-bit timer
脳
2
Watchdog timer: 17-bit
脳
1
I
2
C
脳
1: for multimaster mode, bus line (output) has 2 systems
Sync serial / I
2
C (master) / UART
脳
2
鈥?Built-in sync separator
脳
2
Timer Counter
Serial Interface
Caption
I/O Pins
A/D Inputs
D/A Outputs
PWM
Special Ports
CRTC
Notes
Electrical Characteristics
D/A characteristics
I/O
50
鈥?Common use
8-bit
脳
12-ch. (with S/H)
4-bit
脳
4-ch. (analog R, G, B, YM output)
8-bit
脳
7-ch.
Remote control reception
3-layer display (graphics, characters, splits)
Remote control input discriminant circuit built-in
Limit
Parameter
D/Afull-scaleoutputcurrent
D/A output voltage setting range
D/A non-linear error
D/A differential non-linear error
D/A channel interval error
Symbol
IFS
VO
NLE
DNLE
IFS
Condition
min
RL = 200
鈩?
VREF = 1.2 V, RIREF = 1.2 k鈩?/div>
RL = 200
鈩?
VREF = 1.2 V, RIREF = 1.2 k鈩?/div>
RL = 200
鈩?
VREF = 1.2 V, RIREF = 1.2 k鈩?/div>
RL = 200
鈩?
VREF = 1.2 V, RIREF = 1.2 k鈩?/div>
VREF = 1.2 V, RIREF = 1.2 k鈩? Error from 4-channel average IFS
4.5
0.9
typ
5.0
max
5.5
1.1
鹵
0.5
鹵
0.5
鹵
5
mA
V
LSB
LSB
%
Unit
(Ta = 25擄C , VDD = AVDD = 3.3 V , VSS = 0 V , fosc = 4 MHz)
1
MAE00014DEM
1
2
3
