MN101D10F , MN101D10G
Type
ROM (脳 8-bit)
脳
RAM (脳 8-bit)
脳
Package
Minimum Instruction
Execution Time
Interrupts
With main clock operated
When sub-clock operated
MN101D10F
96 K
2.5 K
QFP100-P-1818B
*Lead-free
0.1397
碌s
(at 4.0 V to 5.5 V, 14.32 MHz)
71.5
碌s
(at 2.7 V to 5.5 V fixed to 14.32 MHz internal frequency division)
61
碌s
(at 2.5 V to 5.5 V, 32.768 kHz)
MN101D10G
128 K
3.5 K
鈥?RESET 鈥?Runaway 鈥?External 0 鈥?External 1 鈥?External 2 鈥?External 3 鈥?External 4
鈥?Timer 0 鈥?Timer 1 鈥?Timer 2 鈥?Timer 3 鈥?Timer 6 鈥?Capstan FG 鈥?Control 鈥?HSW
鈥?Cylinder(Drum) FG 鈥?Servo V-sync 鈥?Synchronous output 鈥?OSD 鈥?XDS 鈥?Serial 0
鈥?Serial 1 鈥?Serial 2 鈥?PWM 4 鈥?OSDV-sync
Timer counter 0: 8-bit
脳
1 (timer function)
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/4, 1/16 of system clock frequency
Interrupt source 路路路路路路路路路路路路路路路路路 overflow of timer counter 0
Timer counter 1: 8-bit
脳
1 (timer function, linear timer counter function)
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/4 of system clock frequency; CTL signal
Interrupt source 路路路路路路路路路路路路路路路路路 overflow of timer counter 1
Timer counter 2: 16-bit
脳
1 (timer function, input capture,duty judgment of CTL signal(VISS/VASS detection
function), generation of remote control output carrier frequency)
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/4, 1/16, 1/24 of system clock frequency
Interrupt source 路路路路路路路路路路路路路路路路路 overflow of timer counter 2; input of CTL specified edge; underflow of timer 2
shift register 4-bit counter; coincidence of timer 2 shift register with timer 2 shift
register compare register
Timer counter 3: 16-bit
脳
1 (timer function, generation of serial transmission clock)
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/4, 1/16 of system clock frequency
Interrupt source 路路路路路路路路路路路路路路路路路 overflow of timer counter 3
Timer counter 5: 19-bit
脳
1 (watchdog, stable oscillation waiting function)
Clock source 路路路路路路路路路路路路路路路路路路路路路 system clock
Watchdog interrupt source 路路路 1/2
16
, 1/2
19
of timer counter 5 frequency
Clear by stable oscillation 路路路 after 256 counts by timer counter 5 (2
18
counts of OSC oscillation clock)
Timer counter 6: 16-bit
脳
1 (clock function [max. 2 s])
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/512 of OSC oscillation clock frequency; XI oscillation clock;
1/8, 1/128 of system clock frequency
Interrupt source 路路路路路路路路路路路路路路路路路 1/2
13
, 1/2
14
, 1/2
15
overflow of timer counter 6
Serial 0: 8-bit
脳
1 (synchronous type)
(transfer direction of MSB/LSB selectable, start condition function)
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; NSBT0 pin input
Serial 1: 8-bit
脳
1 (synchronous type/remote control transmission)
(transfer direction of MSB/LSB selectable, start condition function)
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; 2-division timer 3
output; NSBT1 pin input
Remote control clock 路路路路路路路 2-division timer 3 output
Serial 2: 8-bit
脳
1 (I
2
C) (master transmission/reception, slave transmission/reception)
Clock source 路路路路路路路路路路路路路路路路路路路路路 1/144 to 1/252 of system clock; SCK pin input
Timer Counter
Serial Interface
MAD00043BEM
1
2
3
4
5
