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MMUN2211LT1_05 Datasheet

  • MMUN2211LT1_05

  • ON Semiconductor [Bias Resistor Transistor]

  • ONSEMI

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MMUN2211LT1 Series
Preferred Devices
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT-23 package which is designed for low power surface mount
applications.
Features
http://onsemi.com
R1
PIN 1
BASE
(INPUT)
R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
鈥?/div>
Simplifies Circuit Design
鈥?/div>
Reduces Board Space and Component Count
鈥?/div>
Pb鈭扚ree Packages are Available
MAXIMUM RATINGS
(T
A
= 25擄C unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
SOT鈭?3
CASE 318
STYLE 6
MARKING DIAGRAM
A8x M
G
G
1
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25擄C
Derate above 25擄C
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Lead
Junction and Storage Temperature
Range
Symbol
P
D
Max
246 (Note 1)
400 (Note 2)
1.5 (Note 1)
2.0 (Note 2)
508 (Note 1)
311 (Note 2)
174 (Note 1)
208 (Note 2)
鈭?5 to +150
Unit
mW
擄C/W
擄C/W
擄C/W
擄C
A8x = Specific Device Code
M
= Date Code
G
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
Preferred
devices are recommended choices for future use
and best overall value.
R
qJA
R
qJL
T
J
, T
stg
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR鈭? @ minimum pad
2. FR鈭? @ 1.0 x 1.0 inch pad
漏
Semiconductor Components Industries, LLC, 2005
August, 2005 鈭?Rev. 7
Publication Order Number:
MMUN2211LT1/D

MMUN2211LT1_05 PDF文件相關(guān)型號(hào)

MMUN2211LT1G,MMUN2211LT3G,MMUN2214LT1G,MMUN2216LT1G,MMUN2232LT1G,MMUN2234LT3,MMUN2234LT3G

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