鈩?/div>
SOT-223 for Surface Mount
N鈥揅hannel Enhancement鈥揗ode Silicon Gate
TMOS V is a new technology designed to achieve an on鈥搑esis-
tance area product about one鈥揾alf that of standard MOSFETs. This
new technology more than doubles the present cell density of our
50 and 60 volt TMOS devices. Just as with our TMOS E鈥揊ET
designs, TMOS V is designed to withstand high energy in the
avalanche and commutation modes. Designed for low voltage, high
speed switching applications in power supplies, converters and
power motor controls, these devices are particularly well suited for
bridge circuits where diode speed and commutating safe operating
areas are critical and offer additional safety margin against
unexpected voltage transients.
New Features of TMOS V
鈥?/div>
On鈥搑esistance Area Product about One鈥揾alf that of Standard
MOSFETs with New Low Voltage, Low RDS(on) Technology
鈥?/div>
Faster Switching than E鈥揊ET Predecessors
Features Common to TMOS V and TMOS E鈥揊ETS
鈥?/div>
Avalanche Energy Specified
鈥?/div>
IDSS and VDS(on) Specified at Elevated Temperature
鈥?/div>
Static Parameters are the Same for both TMOS V and TMOS E鈥揊ET
鈥?/div>
Available in 12 mm Tape & Reel
Use MMFT3055VT1 to order the 7 inch/1000 unit reel
Use MMFT3055VT3 to order the 13 inch/4000 unit reel
MAXIMUM RATINGS
(TC = 25擄C unless otherwise noted)
Rating
Drain鈥搕o鈥揝ource Voltage
Drain鈥搕o鈥揋ate Voltage (RGS = 1.0 M鈩?
Gate鈥搕o鈥揝ource Voltage 鈥?Continuous
Gate鈥搕o鈥揝ource Voltage
鈥?Non鈥搑epetitive (tp
鈮?/div>
10 ms)
Drain Current 鈥?Continuous
Drain Current
鈥?Continuous @ 100擄C
Drain Current
鈥?Single Pulse (tp
鈮?/div>
10
碌s)
Total PD @ TA = 25擄C mounted on 1鈥?sq. Drain pad on FR鈥? bd material
Total PD @ TA = 25擄C mounted on 0.70鈥?sq. Drain pad on FR鈥? bd material
Total PD @ TA = 25擄C mounted on min. Drain pad on FR鈥? bd material
Derate above 25擄C
Operating and Storage Temperature Range
Single Pulse Drain鈥搕o鈥揝ource Avalanche Energy 鈥?Starting TJ = 25擄C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 3.4 Apk, L = 10 mH, RG = 25
鈩?/div>
)
Thermal Resistance
鈥?Junction to Ambient on 1鈥?sq. Drain pad on FR鈥? bd material
鈥?Junction to Ambient on 0.70鈥?sq. Drain pad on FR鈥? bd material
鈥?Junction to Ambient on min. Drain pad on FR鈥? bd material
Maximum Lead Temperature for Soldering Purposes, 1/8鈥?from case for 10 seconds
TM
MMFT3055V
TMOS POWER FET
1.7 AMPERES
60 VOLTS
RDS(on) = 0.130 OHM
D
4
G
S
CASE 318E鈥?4, Style 3
TO鈥?61AA
1
2
3
Symbol
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
Value
60
60
鹵
20
鹵
25
1.7
1.4
6.0
2.0
1.7
0.9
6.3
鈥?55 to 175
58
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
mW/擄C
擄C
mJ
擄C/W
TJ, Tstg
EAS
R
胃JA
R
胃JA
R
胃JA
TL
70
88
159
260
擄C
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E鈥揊ET and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
漏
Motorola TMOS
Motorola, Inc. 1996
Power MOSFET Transistor Device Data
1
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