MM54HC299 MM74HC299 8-Bit TRI-STATE Universal Shift Register
January 1988
MM54HC299 MM74HC299
8-Bit TRI-STATE Universal Shift Register
General Description
This 8-bit TRI-STATE shift storage register utilizes advanced
silicon-gate CMOS technology Along with the low power
consumption and high noise immunity of standard CMOS
integrated circuits it has the ability to drive 15 LS-TTL
loads This circuit also features operating speeds compara-
ble to the equivalent low power Schottky device
The MM54HC299 MM74HC299 features multiplexed in-
puts outputs to achieve full 8-bit data handling in a single
20-pin package Due to the large output drive capability and
TRI-STATE feature this device is ideally suited for interfac-
ing with bus lines in a bus oriented system
Two function select inputs and two output control inputs are
used to choose the mode of operation as listed in the func-
tion table Synchronous parallel loading is accomplished by
taking both function select lines S0 and S1 high This places
the TRI-STATE outputs in a high impedance state which
permits data applied to the input output lines to be clocked
into the register Reading out of the register can be done
while the outputs are enabled in any mode A direct overrid-
ing CLEAR input is provided to clear the register whether
the outputs are enabled or disabled
The 54HC 74HC logic family is functionally as well as pinout
compatible with the standard 54LS 74LS logic family All
inputs are protected from damage due to static discharge by
internal diode clamps to V
CC
and ground
Features
Y
Y
Y
Y
Y
Typical operating frequency 40 MHz
Typical propagation delay 20 ns
Low quiescent current 80
mA
maximum (74HC)
High output drive for bus applications
Low quiescent current 1
mA
maximum
Connection Diagram
Dual-In-Line Package
TL F 5207 鈥?1
Order Number MM54HC299 or MM74HC299
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 5207
RRD-B30M105 Printed in U S A