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MM74HC132SJ Datasheet

  • MM74HC132SJ

  • Quad 2-Input NAND Schmitt Trigger

  • 82.84KB

  • 6頁(yè)

  • FAIRCHILD

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MM74HC132 Quad 2-Input NAND Schmitt Trigger
September 1983
Revised February 1999
MM74HC132
Quad 2-Input NAND Schmitt Trigger
General Description
The MM74HC132 utilizes advanced silicon-gate CMOS
technology to achieve the low power dissipation and high
noise immunity of standard CMOS, as well as the capability
to drive 10 LS-TTL loads.
The 74HC logic family is functionally and pinout compatible
with the standard 74LS logic family. All inputs are protected
from damage due to static discharge by internal diode
clamps to V
CC
and ground.
Features
s
Typical propagation delay: 12 ns
s
Wide power supply range: 2V鈥?V
s
Low quiescent current: 20
碌A(chǔ)
maximum (74HC Series)
s
Low input current: 1
碌A(chǔ)
maximum
s
Fanout of 10 LS-TTL loads
s
Typical hysteresis voltage: 0.9V at V
CC
=4.5V
Ordering Code:
Order Number
MM74HC132M
MM74HC132SJ
MM74HC132MTC
MM74HC132N
Package Number
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150鈥?Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code. (Tape and Reel not available in N14A.)
Connection Diagram
Pin Assignment for DIP, SOIC, SOP, and TSSOP
Logic Diagram
Top View
漏 1999 Fairchild Semiconductor Corporation
DS005309.prf
www.fairchildsemi.com

MM74HC132SJ 產(chǎn)品屬性

  • 47

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74HC

  • 與非門

  • 4

  • 2

  • 施密特觸發(fā)器

  • 2 V ~ 6 V

  • 2µA

  • 5.2mA，5.2mA

  • 0.3 V ~ 1.2 V

  • 1.5 V ~ 4.2 V

  • 21ns @ 6V，50pF

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-SOIC

  • 14-SOIC（0.209"，5.30mm 寬）

  • 管件

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