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MM74C905N Datasheet

  • MM74C905N

  • 12-Bit Successive Approximation Register

  • 8頁

  • FAIRCHILD

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MM74C905 12-Bit Successive Approximation Register
October 1987
Revised January 1999
MM74C905
12-Bit Successive Approximation Register
General Description
The MM74C905 CMOS 12-bit successive approximation
register contains all the digit control and storage necessary
for successive approximation analog-to-digital conversion.
Because of the unique capability of CMOS to switch to
each supply rail without any offset voltage, it can also be
used in digital systems as the control and storage element
in repetitive routines.
Features
s
Wide supply voltage range:
s
Guaranteed noise margin:
s
High noise immunity:
3.0V to 15V
1.0V
0.45 V
CC
(typ)
Fan out of 2 driving 74L
s
Low power TTL compatibility:
s
Provision for register extension or truncation
s
Operates in START/STOP or continuous conversion
mode
s
Drive ladder switches directly. For 10 bits or less with
50k/100k R/2R ladder network
Ordering Code:
Order Number
MM74C905N
Package Number
N24A
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600鈥?Wide
Connection Diagram
Pin Assignments for DIP
漏 1999 Fairchild Semiconductor Corporation
DS005910.prf
www.fairchildsemi.com

MM74C905N 產(chǎn)品屬性

  • 15

  • 集成電路 (IC)

  • 邏輯 - 移位寄存器

  • 74C

  • 逐次近似寄存器

  • 標(biāo)準(zhǔn)

  • 1

  • 12

  • 通用

  • 3 V ~ 15 V

  • -40°C ~ 85°C

  • 通孔

  • 24-DIP（0.600"，15.24mm）

  • 24-PDIP

  • 管件

  • 74C90574C905N

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