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MM74C08 Datasheet

  • MM74C08

  • Quad 2-Input AND Gate

  • 4頁

  • NSC

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MM54C08 MM74C08 Quad 2-Input AND Gate
February 1988
MM54C08 MM74C08 Quad 2-Input AND Gate
General Description
Employing complementary MOS (CMOS) transistors to
achieve wide power supply operating range low power con-
sumption and high noise margin these gates provide basic
functions used in the implementation of digital integrated
circuit systems The N- and P-channel enhancement mode
transistors provide a symmetrical circuit with output swing
essentially equal to the supply voltage No DC power other
than that caused by leakage current is consumed during
static condition All inputs are protected from damage due
to static discharge by diode clamps to V
CC
and GND
Features
Y
Y
Y
Y
Y
Wide supply voltage range
Guaranteed noise margin
High noise immunity
Low power
TTL compatibility
Low power consumption
3 0V to 15V
1 0V
0 45 V
CC
(typ )
Fan out of 2
driving 74L
10 nW package (typ )
Connection Diagram and Truth Table
Dual-In-Line Package
TL F 5878 鈥?1
Top View
Order Number MM54C08 or MM74C08
Inputs
A
L
L
H
H
H
e
High Level
Outputs
B
L
H
L
H
L
e
Low Level
Y
L
L
L
H
C
1995 National Semiconductor Corporation
TL F 5878
RRD-B30M105 Printed in U S A

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