鈥?/div>
Integrated VCO/PLL
Miniature SMT Package
Low Phase Noise
+5V Operation
12 Lead Package
12 11 10 9
8
7
DETAIL A
M/ A- COM LTD
PART NO.
12.1
14.6
0.2
0.6
6.0 MAX
0.8
1.0
DETAIL A
Description
The MLS9109-00881 synthesizer design integrates a high perfor-
mance buffered VCO, PLL circuit and discrete loop filter in a
surface mount package. The SMT packaging provides electrical
shielding, easy PCB assembly and repeatable performance. The
synthesizer is designed for use in CDMA base stations and is
optimised for coverage of the cellular Tx band, 30 kHz step size
and low phase noise requirements.
M/A-COM synthesizers are manufactured in an ISO 9001 certi-
fied facility, incorporating surface mount assembly and automated
electrical testing. This ensures consistent electrical performance
and quality over volume production quantities.
1
IDENT
1
DATE CODE
2
3
4
5
6
1.8
2.0
TYP. in 5 POSITIONS
13.6 MAX
Electrical Specifications , T
A
= +25擄C, V
CC
= +5V ,
鈭咶
= 30 kHz, F
R
= 15 MHz
(unless otherwise stated)
Parameter
Frequency Range (F
OUT
)
3
RF Output Power (P
OUT
)
Harmonic Output
Spurious Output
Phase Noise
4
2
Test Conditions
Over T
OP
Over T
OP
Phase comparison frequency (F
OUT
鹵
鈭咶)
Reference breakthrough (F
OUT
鹵
F
R
)
SSB at 500 Hz offset from carrier
SSB at 1 kHz offset from carrier
SSB at 10 kHz offset from carrier
SSB at 100 kHz offset from carrier
300 Hz to 3 kHz bandwidth
Over F
OUT
, measured to within 鹵 500 Hz
Units
MHz
dBm
dBc
dBc
dBc
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
mrad rms
ms
mA
mA
V
V
kHz
MHz
Min.
869
-1.0
Typ.
Max.
894
+5.0
-12
-70
-60
-75
-100
-120
Integrated Phase Noise
5,6
Frequency Switching Time
VCO Supply Current (I
CC1
)
PLL Supply Current (I
CC2
)
VCO Supply Voltage (V
CC1
)
PLL Supply Voltage (V
CC2
)
Step Size (鈭咶)
7
8
Reference Frequency (F
R
)
-15
-85
-90
-70
-80
-107
-128
12
25
15
7
+4.75
+4.75
30
3
Recommended operating limit
Recommended operating limit
Recommended operating limit
0.5 to 2.0 Vpp sine wave into a.c. coupled
CMOS. Recommended operating limit
20
12
+5.25
+5.25
20
1. All specification limits are indicated values and apply over F
OUT
and
for 50
鈩?/div>
load impedance.
2. Programming control is 3 wire serial CMOS or TTL levels, in accor-
dance with National Semiconductor LMX 1511.
3. Output power window includes variation over operating temperature
range (T
OP
) -40擄C to +85擄C and output frequency range (F
OUT
).
4. See plot for typical phase noise at other frequency offsets.
5. See plot for typical full band switching time measured to within
other offsets from final frequency.
6. Integral PLL lock monitor output, TTL high locked, TTL low un-
locked.
7. Device designed for loop bandwidth of 150 Hz.
8. Reference frequency input impedance 10 k鈩?min.
V2.00
M/A-COM Division of AMP Incorporated
s
North America: Tel. (800) 366-2266, Fax (800) 618-8883
s
Asia/Pacific: Tel.+85 2 2111 8088,
Fax +85 2 2111 8087
s
Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
www.macom.com
AMP and Connecting at a Higher Level are trademarks.
Specifications subject to change without notice.
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