ML6695CQ Datasheet

IC型號：
ML6695CQ
PDF描述：
100BASE-X Fiber Physical Layer With 5-bit Interface
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219.64KB
PDF頁數(shù)：
8頁
芯片廠家：
MICRO-LINEAR

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December 1998

PRELIMINARY

ML6695

100BASE-X Fiber Physical Layer With 5-bit Interface

GENERAL DESCRIPTION

The ML6695 implements the physical layer of the Fast

Ethernet 100BASE-X standard for fiber media. The device

provides the 5-bit (or symbol) interface for interface to

upper-layer silicon. The ML6695 integrates the data

quantizer and the LED driver, allowing the use of low cost

optical PMD components.

The ML6695 includes 125MHz clock recovery/clock

generation, an LED driver, and a data quantizer (post

amplifier). The device also offers a power down mode

which results in total power consumption of less than 20mA.

The ML6695 is suitable for the current 100BASE-FX IEEE

803.2u standard defined using 1300nm optics, as well as

for the

proposed

100BASE-SX standard defined using lower

cost 820nm optics.

FEATURES

100BASE-FX physical layer with 5-bit interface

Optimal 100BASE-SX solution (draft standard)

Integrated data quantizer (post-amplifier)

Integrated LED driver

125MHz clock generation and recovery

Power-down mode

BLOCK DIAGRAM

LPBK

TXC

CLOCK

SYNTHESIZER

PWRDN

IOUT

TSM4

TSM3

TSM2

TSM1

TSM0

SERIALIZER

NRZ TO NRZI

ENCODER

LED

DRIVER

IOUT

RTSET

SDO

SIGNAL

DETECT

RXC

RSM4

RSM3

RSM2

RSM1

RSM0

DESERIALIZER

CLOCK & DATA

RECOVERY

NRZI TO NRZ

DECODER

DATA QUANTIZER

(POST AMPLIFIER)

VIN鈥?/div>

VIN+

CAPB

CAPDC

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