Order this document by MC34181/D
MC34181,2,4
Low Power, High Slew Rate,
Wide Bandwidth, JFET Input
Operational Amplifiers
Quality bipolar fabrication with innovative design concepts are employed
for the MC33181/2/4, MC34181/2/4 series of monolithic operational
amplifiers. This JFET input series of operational amplifiers operates at
210
碌A(chǔ)
per amplifier and offers 4.0 MHz of gain bandwidth product and
10 V/碌s slew rate. Precision matching and an innovative trim technique of
the single and dual versions provide low input offset voltages. With a JFET
input stage, this series exhibits high input resistance, low input offset voltage
and high gain. The all NPN output stage, characterized by no deadband
crossover distortion and large output voltage swing, provides high
capacitance drive capability, excellent phase and gain margins, low open
loop high frequency output impedance and symmetrical source/sink AC
frequency response.
The MC33181/2/4, MC34181/2/4 series of devices are specified over the
commercial or industrial/vehicular temperature ranges. The complete series
of single, dual and quad operational amplifiers are available in the plastic
DIP as well as the SOIC surface mount packages.
鈥?/div>
Low Supply Current: 210
碌A(chǔ)
(Per Amplifier)
8
1
8
1
MC33181,2,4
P SUFFIX
PLASTIC PACKAGE
CASE 626
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO鈥?)
PIN CONNECTIONS
Offset Null
Inputs
VEE
1
2
3
4
鈥?/div>
+
8
7
6
5
NC
VCC
Output
Offset Null
(Single, Top View)
VCC
Output 2
Inputs 2
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Wide Supply Operating Range:
鹵1.5
V to
鹵18
V
Wide Bandwidth: 4.0 MHz
High Slew Rate: 10 V/碌s
Low Input Offset Voltage: 2.0 mV
Large Output Voltage Swing: 鈥?4 V to +14 V (with
鹵15
V Supplies)
Large Capacitance Drive Capability: 0 pF to 500 pF
Low Total Harmonic Distortion: 0.04%
Excellent Phase Margin: 67擄
Excellent Gain Margin: 6.7 dB
Output Short Circuit Protection
Offered in New TSSOP Package Including the Standard SOIC and
DIP Packages
ORDERING INFORMATION
Op Amp
Function
Single
Device
MC34181P
MC34181D
MC33181P
MC33181D
Dual
MC34182P
MC34182D
MC33182P
MC33182D
Quad
MC34184P
MC34184D
MC34184DTB
MC33184P
MC33184D
MC33184DTB
Operating
Temperature Range
TA = 0擄 to +70擄C
TA = 鈥?0擄 to +85擄C
TA = 0擄 to +70擄C
TA = 鈥?0擄 to +85擄C
Package
Plastic DIP
SO鈥?
Plastic DIP
SO鈥?
Plastic DIP
SO鈥?
Plastic DIP
SO鈥?
Plastic DIP
SO鈥?4
TSSOP鈥?4
Plastic DIP
SO鈥?4
TSSOP鈥?4
14
1
Output 1
Inputs 1
VEE
1
2
3
4
1
鈥?/div>
+
2
鈥?/div>
+
8
7
6
5
(Dual, Top View)
14
1
P SUFFIX
PLASTIC PACKAGE
CASE 646
14
1
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO鈥?4)
DTB SUFFIX
PLASTIC PACKAGE
CASE 948G
(TSSOP鈥?4)
PIN CONNECTIONS
Output 1
Inputs 1
VCC
Inputs 2
6
1
2
3
4
5
+
鈥?/div>
+
鈥?/div>
鈥?/div>
+
鈥?/div>
鈥?/div>
+
14
13
12
11
10
9
8
Output 4
Inputs 4
VEE
Inputs 3
Output 3
1
4
TA = 0擄 to +70擄C
2
3
Output 2
7
TA = 鈥?0擄 to +85擄C
(Quad, Top View)
漏
Motorola, Inc. 1996
Rev 1
MOTOROLA ANALOG IC DEVICE DATA
1
MC34182P PDF文件相關(guān)型號(hào)
MC34182U,MC35181
MC34182P相關(guān)型號(hào)PDF文件下載
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