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MC14532BCL Datasheet

  • MC14532BCL

  • Motorola, Inc [8-BIT PRIORITY ENCODER]

  • MOTOROLA   MOTOROLA

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14532B
8-Bit Priority Encoder
The MC14532B is constructed with complementary MOS (CMOS)
enhancement mode devices. The primary function of a priority encoder is to
provide a binary address for the active input with the highest priority. Eight
data inputs (D0 thru D7) and an enable input (Ein) are provided. Five outputs
are available, three are address outputs (Q0 thru Q2), one group select (GS)
and one enable output (Eout).
鈥?/div>
Diode Protection on All Inputs
鈥?/div>
Supply Voltage Range = 3.0 Vdc to 18 Vdc
鈥?/div>
Capable of Driving Two Low鈥損ower TTL Loads or One Low鈥揚(yáng)ower
Schottky TTL Load over the Rated Temperature Range
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
VDD
Parameter
DC Supply Voltage
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
Value
Unit
V
V
鈥?0.5 to + 18.0
鹵
10
500
鈥?65 to + 150
260
Vin, Vout
Iin, Iout
PD
Tstg
TL
Input or Output Voltage (DC or Transient)
鈥?0.5 to VDD + 0.5
Input or Output Current (DC or Transient),
per Pin
Power Dissipation, per Package鈥?/div>
Storage Temperature
Lead Temperature (8鈥揝econd Soldering)
mA
mW
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = 鈥?55擄 to 125擄C for all packages.
_
C
_
C
PIN ASSIGNMENT
D4
D5
D6
D7
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD
Eout
GS
D3
D2
D1
D0
Q0
* Maximum Ratings are those values beyond which damage to the device may occur.
鈥燭emperature Derating:
Plastic 鈥淧 and D/DW鈥?Packages: 鈥?7.0 mW/
_
C From 65
_
C To 125
_
C
Ceramic 鈥淟鈥?Packages: 鈥?12 mW/
_
C From 100
_
C To 125
_
C
TRUTH TABLE
Input
Ein
0
1
1
1
1
1
1
1
1
1
D7
X
0
1
0
0
0
0
0
0
0
D6
X
0
X
1
0
0
0
0
0
0
D5
X
0
X
X
1
0
0
0
0
0
D4
X
0
X
X
X
1
0
0
0
0
D3
X
0
X
X
X
X
1
0
0
0
D2
X
0
X
X
X
X
X
1
0
0
D1
X
0
X
X
X
X
X
X
1
0
D0
X
0
X
X
X
X
X
X
X
1
GS
0
0
1
1
1
1
1
1
1
1
Q2
0
0
1
1
1
1
0
0
0
0
Output
Q1
0
0
1
1
0
0
1
1
0
0
Q0
0
0
1
0
1
0
1
0
1
0
Eout
0
1
0
0
0
0
0
0
0
0
Ein
Q2
Q1
VSS
X = Don鈥檛 Care
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS
鈮?/div>
(Vin or Vout)
鈮?/div>
VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
REV 3
1/94
漏
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
MC14532B
1

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