鈥?/div>
Diode Protection on All Inputs
Fully Static Operation
Output Transitions Occur on the Rising Edge of the Clock Pulse
Exceedingly Slow Input Transition Rates May Be Applied to the
Clock Input
3鈥揝tate Output at 64th鈥揃it Allows Use in Bus Logic Applications
Shift Registers of any Length may be Fully Loaded with 16 Clock
Pulses
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low鈥損ower TTL Loads or One Low鈥損ower
Schottky TTL Load Over the Rated Temperature Range
AWLYYWW
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 1.)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation,
per Package (Note 2.)
Operating Temperature Range
Storage Temperature Range
Lead Temperature
(8鈥揝econd Soldering)
Value
鈥?0.5 to +18.0
鈥?0.5 to V
DD
+ 0.5
鹵10
500
鈥?55 to +125
鈥?65 to +150
260
Unit
V
V
mA
mW
擄C
擄C
擄C
ORDERING INFORMATION
Device
MC14517BCP
MC14517BDW
MC14517BDWR2
Package
PDIP鈥?6
SOIC鈥?6
SOIC鈥?6
Shipping
2000/Box
47/Rail
1000/Tape & Reel
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic 鈥淧 and D/DW鈥?Packages: 鈥?7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high鈥搃mpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
v
v
漏
Semiconductor Components Industries, LLC, 2000
1
March, 2000 鈥?Rev. 3
Publication Order Number:
MC14517B/D
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