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MC14516BDG Datasheet

  • MC14516BDG

  • ON Semiconductor [Binary Up/Down Counter]

  • ONSEMI

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MC14516B
Binary Up/Down Counter
The MC14516B synchronous up/down binary counter is
constructed with MOS P鈭抍hannel and N鈭抍hannel enhancement mode
devices in a monolithic structure.
This counter can be preset by applying the desired value, in binary,
to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset
Enable (PE) high. The direction of counting is controlled by applying
a high (for up counting) or a low (for down counting) to the
UP/DOWN input. The state of the counter changes on the positive
transition of the clock input.
Cascading can be accomplished by connecting the Carry Out to the
Carry In of the next stage while clocking each counter in parallel. The
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high
to the reset (R) pin.
This CMOS counter finds primary use in up/down and difference
counting. Other applications include: (1) Frequency synthesizer
applications where low power dissipation and/or high noise immunity
is desired, (2) Analog鈭抰o鈭扗igital and Digital鈭抰o鈭扐nalog conversions,
and (3) Magnitude and sign generation.
Features
http://onsemi.com
MARKING
DIAGRAMS
16
MC14516BCP
AWLYYWWG
1
PDIP鈭?6
P SUFFIX
CASE 648
1
SOIC鈭?6
D SUFFIX
CASE 751B
1
16
14516BG
AWLYWW
1
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Internally Synchronous for High Speed
Logic Edge鈭扖locked Design 鈥?Count Occurs on Positive Going
Edge of Clock
Single Pin Reset
Asynchronous Preset Enable Operation
Capable of Driving Two Low鈭扨ower TTL Loads or One Low鈭扨ower
Schottky Load Over the Rated Temperature Range
Pb鈭扚ree Packages are Available*
16
SOEIAJ鈭?6
F SUFFIX
CASE 966
1
1
MC14516B
ALYWG
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current (DC or Transient)
per Pin
Power Dissipation, per Package (Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature (8鈭扴econd Soldering)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Value
鈭?.5 to +18.0
鈭?.5 to V
DD
+ 0.5
10
500
鈭?5 to +125
鈭?5 to +150
260
Unit
V
V
mA
mW
擄C
擄C
擄C
This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated
voltages to this high鈭抜mpedance circuit. For proper
operation, V
in
and V
out
should be constrained to the
range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either V
SS
or V
DD
). Unused
outputs must be left open.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic 鈥淧 and D/DW鈥?/div>
Packages: 鈥?7.0 mW/_C From 65_C To 125_C
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2006
1
June, 2006 鈭?Rev. 7
Publication Order Number:
MC14516B/D

MC14516BDG PDF文件相關(guān)型號(hào)

MC14516BDR2G,MC14516BFG

MC14516BDG 產(chǎn)品屬性

  • 48

  • 集成電路 (IC)

  • 邏輯 -計(jì)數(shù)器,除法器

  • 4000B

  • 二進(jìn)制計(jì)數(shù)器

  • 上,下

  • 1

  • 4

  • 異步

  • 同步

  • 8MHz

  • 正邊沿

  • 3 V ~ 18 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 16-SOIC(0.154",3.90mm 寬)

  • 16-SOIC

  • 管件

  • MC14516BDGOS

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