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MC14514BDWR2G Datasheet

  • MC14514BDWR2G

  • ON Semiconductor [4−Bit Transparent Latch / 4&...

  • ONSEMI

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MC14514B, MC14515B
4鈭払it Transparent Latch /
4鈭抰o鈭?6 Line Decoder
The MC14514B and MC14515B are two output options of a 4 to 16
line decoder with latched inputs. The MC14514B (output active high
option) presents a logical 鈥?鈥?at the selected output, whereas the
MC14515B (output active low option) presents a logical 鈥?鈥?at the
selected output. The latches are R鈭扴 type flip鈭抐lops which hold the
last input data presented prior to the strobe transition from 鈥?鈥?to 鈥?鈥?
These high and low options of a 4鈭抌it latch / 4 to 16 line decoder are
constructed with N鈭抍hannel and P鈭抍hannel enhancement mode
devices in a single monolithic structure. The latches are R鈭扴 type
flip鈭抐lops and data is admitted upon a signal incident at the strobe
input, decoded, and presented at the output.
These complementary circuits find primary use in decoding
applications where low power dissipation and/or high noise immunity
is desired.
Features
http://onsemi.com
MARKING
DIAGRAMS
24
1
PDIP鈭?4
P SUFFIX
CASE 709
1
MC145xxBCP
AWLYYWWG
鈥?/div>
Supply Voltage Range = 3.0 Vdc to 18 Vdc
鈥?/div>
Capable of Driving Two Low鈭抪ower TTL Loads or One Low鈭抪ower
Schottky TTL Load the Rated Temperature Range
鈥?/div>
Pb鈭扚ree Packages are Available*
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current (DC or Transient)
per Pin
Power Dissipation per Package (Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature (8鈭扴econd Soldering)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Value
鈭?.5 to +18.0
鈭?.5 to V
DD
+0.5
鹵
10
500
鈭?5 to +125
鈭?5 to +150
260
Unit
V
V
mA
1
SOIC鈭?4
DW SUFFIX
CASE 751E
24
MC145xxB
AWLYYWWG
1
xx
A
WL
YY
WW
G
= 14 or 15
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
PIN ASSIGNMENT
mW
擄C
擄C
擄C
ST
D1
D2
S7
S6
S5
S4
S3
S1
S2
S0
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
DD
INH
D4
D3
S10
S11
S8
S9
S14
S15
S12
S13
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic 鈥淧 and D/DW鈥?/div>
Packages: 鈥?7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high鈭抜mpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1
June, 2006 鈭?Rev. 6
Publication Order Number:
MC14514B/D

MC14514BDWR2G PDF文件相關(guān)型號(hào)

MC14515BCP,MC14515BCPG

MC14514BDWR2G 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 信號(hào)開關(guān)，多路復(fù)用器，解碼器

  • 4000B

  • 解碼器

  • 1 x 4:16

  • 1

  • -

  • 單電源

  • 3 V ~ 18 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 24-SOIC（0.295"，7.50mm 寬）

  • 24-SOIC

  • 帶卷 (TR)

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