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MC14106BCP Datasheet

  • MC14106BCP

  • ON Semiconductor [Hex Schmitt Trigger]

  • ONSEMI

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MC14106B
Hex Schmitt Trigger
The MC14106B hex Schmitt Trigger is constructed with MOS
P鈥揷hannel and N鈥揷hannel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14106B
may be used in place of the MC14069UB hex inverter for enhanced
noise immunity or to 鈥渟quare up鈥?slowly changing waveforms.
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP鈥?4
P SUFFIX
CASE 646
1
14
SOIC鈥?4
D SUFFIX
CASE 751A
Unit
V
V
mA
mW
擄C
擄C
擄C
TSSOP鈥?4
DT SUFFIX
CASE 948G
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
1
14
14
106B
ALYW
14106B
AWLYWW
MC14106BCP
AWLYYWW
鈥?/div>
Increased Hysteresis Voltage Over the MC14584B
鈥?/div>
Supply Voltage Range = 3.0 Vdc to 18 Vdc
鈥?/div>
Capable of Driving Two Low鈥損ower TTL Loads or One Low鈥損ower
Schottky TTL Load Over the Rated Temperature Range
鈥?/div>
Pin鈥揻or鈥揚(yáng)in Replacement for CD40106B and MM74C14
鈥?/div>
Can Be Used to Replace the MC14584B or MC14069UB
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 1.)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation,
per Package (Note 2.)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8鈥揝econd Soldering)
Value
鈥?0.5 to +18.0
鈥?0.5 to V
DD
+ 0.5
鹵
10
500
鈥?55 to +125
鈥?65 to +150
260
ORDERING INFORMATION
Device
MC14106BCP
MC14106BD
MC14106BDR2
MC14106BDT
MC14106BDTR2
Package
PDIP鈥?4
SOIC鈥?4
SOIC鈥?4
TSSOP鈥?4
Shipping
2000/Box
55/Rail
2500/Tape & Reel
96/Rail
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic 鈥淧 and D/DW鈥?Packages: 鈥?7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high鈥搃mpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
v
v
TSSOP鈥?4 2500/Tape & Reel
漏
Semiconductor Components Industries, LLC, 2000
1
March, 2000 鈥?Rev. 3
Publication Order Number:
MC14106B/D

MC14106BCP PDF文件相關(guān)型號(hào)

MC14106BCPG

MC14106BCP 產(chǎn)品屬性

  • ON Semiconductor

  • 變換器

  • 6

  • MC141

  • CMOS

  • - 4.2 mA

  • 4.2 mA

  • 250 ns, 100 ns, 80 ns

  • 18 V

  • 3 V

  • + 125 C

  • PDIP-14

  • Tube

  • Through Hole

  • 3 V to 18 V

  • 500

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