MC10H123
Triple 4鈭?鈭?鈭捍nput Bus
Driver
Description
The MC10H123 is a triple 4鈭?鈭?鈭捍nput Bus Driver.
The MC10H123 consists of three NOR gates designed for bus
driving applications on card or between cards. Output low logic levels
are specified with V
OL
=
鈭?.1
Vdc so that the bus may be terminated to
鈭?.0
Vdc. The gate output, when low, appears as a high impedance to
the bus, because the output emitter鈭抐ollowers of the MC10H123 are
鈥渢urned鈭抩ff.鈥?This eliminates discontinuities in the characteristic
impedance of the bus.
The V
OH
level is specified when driving a 25
W
load terminated to
鈭?.0
Vdc, the equivalent of a 50
W
bus terminated at both ends.
Although 25
W
is the lowest characteristic impedance that can be
driven by the MC10H123, higher impedance values may be used with
this part. A typical 50
W
bus is shown in Figure 3.
Features
http://onsemi.com
MARKING DIAGRAMS*
16
MC10H123L
AWLYYWW
CDIP鈭?6
L SUFFIX
CASE 620A
1
鈥?/div>
Propagation Delay, 1.5 ns Typical
鈥?/div>
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
鈥?/div>
Voltage Compensated
鈥?/div>
MECL 10K鈩?Compatible
鈥?/div>
Pb鈭扚ree Packages are Available*
16
1
PDIP鈭?6
P SUFFIX
CASE 648
16
MC10H123P
AWLYYWWG
1
1 20
20 1
PLLC鈭?0
FN SUFFIX
CASE 775
10H123G
AWLYYWW
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2006
February, 2006
鈭?/div>
Rev. 7
1
Publication Order Number:
MC10H123/D
MC10H123_06 PDF文件相關(guān)型號(hào)
MC10H123FNG,MC10H123FNR2
MC10H123_06相關(guān)型號(hào)PDF文件下載
1
2
3
4
5
