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MC10H117_06 Datasheet

  • MC10H117_06

  • ON Semiconductor [Dual 2−Wide 2−3&#...

  • ONSEMI

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MC10H117
Dual 2鈭扺ide 2鈭?鈭捍nput
OR鈭扐ND/OR鈭扐ND Gate
Description
T h e M C 1 0 H 11 7 d u a l 2
鈭抴
i d e 2
鈭? 鈭抜
n p u t O R
鈭扐
N D /
OR鈭扐ND鈭捍nvert gate is a general purpose logic element designed for
use in data control, such as digital multiplexing or data distribution.
Pin 9 is common to both gates. This MECL 10H鈩?part is a
functional/pinout duplication of the standard MECL 10K鈩?family
part, with 100% improvement in propagation delay, and no increase in
power鈭抯upply current.
Features
http://onsemi.com
MARKING DIAGRAMS*
16
MC10H117L
AWLYYWW
CDIP鈭?6
L SUFFIX
CASE 620A
1
鈥?/div>
Propagation Delay, 1.0 ns Typical
鈥?/div>
Power Dissipation 100 mW/Gate Typical (same as MECL 10K)
鈥?/div>
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
鈥?/div>
Voltage Compensated
鈥?/div>
MECL 10K Compatible
鈥?/div>
Pb鈭扚ree Packages are Available*
16
16
1
PDIP鈭?6
P SUFFIX
CASE 648
1
MC10H117P
AWLYYWWG
10H117
ALYWG
SOEIAJ鈭?6
CASE 966
1 20
20 1
PLLC鈭?0
FN SUFFIX
CASE 775
A
WL, L
YY, Y
WW, W
G
10H117G
AWLYYWW
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2006
February, 2006
鈭?/div>
Rev. 7
1
Publication Order Number:
MC10H117/D

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