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MC10212FN Datasheet

  • MC10212FN

  • Motorola, Inc [High Speed Dual 3-Input/3-Output OR/NOR Gate...

  • MOTOROLA   MOTOROLA

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
High Speed Dual 3-Input/
3-Output OR/NOR Gate
The MC10212 is designed to drive up to six transmission lines simul鈥?/div>
taneously. The multiple outputs of this device also allow the wire 鈥淥R鈥濃€搃ng of
several levels of gating for minimization of gate and package count.
The ability to control three parallel lines with minimum propagation delay
from a single point makes the MC10212 particularly useful in clock distribution
applications where minimum clock skew is desired.
MC10212
L SUFFIX
CERAMIC PACKAGE
CASE 620鈥?0
P SUFFIX
PLASTIC PACKAGE
CASE 648鈥?8
FN SUFFIX
PLCC
CASE 775鈥?2
PD = 160 mW typ/pkg (No Load)
tpd = 1.5 ns typ (All Outputs Loaded)
tr, tf = 1.5 ns typ (20%鈥?0%)
LOGIC DIAGRAM
4
5
6
7
3
2
12
9
10
11
13
14
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC2
VCC1
BOUT
BOUT
BOUT
BIN
BIN
BIN
VCC1 = PIN 1, 15
VCC2 = PIN 16
VEE = PIN 8
AOUT
AIN
AIN
AIN
VEE
Pin assignment is for Dual鈥搃n鈥揕ine Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6鈥?1 of the Motorola MECL Data
Book (DL122/D).
3/93
漏
Motorola, Inc. 1996
3鈥?92
REV 5

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