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MC100LVEL92DWG Datasheet

  • MC100LVEL92DWG

  • ON Semiconductor [5V Triple PECL Input to LVPECL Output Tra...

  • ONSEMI

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MC100LVEL92
5V Triple PECL Input to
LVPECL Output Translator
Description
The MC100LVEL92 is a triple PECL input to LVPECL output
translator. The device receives standard PECL signals and translates
them to differential LVPECL output signals.
To accomplish the PECL to LVPECL level translation, the
MC100LVEL92 requires three power rails. The V
CC
supply is to be
connected to the standard 5 V PECL supply, the LV
CC
supply is to be
connected to the 3.3 V LVPECL supply, and Ground is connected to
the system ground plane. Both the V
CC
and LV
CC
should be bypassed
to ground with 0.01
mf
capacitors.
The PECL V
BB
pin, an internally generated voltage supply, is
available to this device only. For single-ended input conditions, the
unused differential input is connected to V
BB
as a switching reference
voltage. V
BB
may also rebias AC coupled inputs. When used,
decouple V
BB
and V
CC
via a 0.01
mF
capacitor and limit current
sourcing or sinking to 0.5 mA. When not used, V
BB
should be
left open.
Features
http://onsemi.com
SO鈭?0 WB
DW SUFFIX
CASE 751D
MARKING DIAGRAM*
20
100LVEL92
AWLYYWWG
鈥?/div>
500 ps Propagation Delays
鈥?/div>
5 V and 3.3 V Supplies Required
鈥?/div>
ESD Protection: Human Body Model; >2 kV,
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Machine Model; >200 V
The 100 Series Contains Temperature Compensation
LVPECL Operating Range: LV
CC
= 3.0 V to 3.8 V
PECL Operating Range: V
CC
= 4.5 V to 5.5 V
Internal Input Pulldown Resistors
Q Output will Default LOW with Inputs Open or < GND + 1.3 V
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V鈭? @ 0.125 in,
Oxygen Index 28 to 34
Transistor Count = 247 devices
Pb鈭扚ree Packages are Available*
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
November, 2006
鈭?/div>
Rev. 11
1
Publication Order Number:
MC100LVEL92/D

MC100LVEL92DWG PDF文件相關型號

MC100LVEL92DWR2G

MC100LVEL92DWG 產(chǎn)品屬性

  • 38

  • 集成電路 (IC)

  • 邏輯 - 變換器

  • 100LVEL

  • 變換器

  • 3

  • PECL

  • LVPECL

  • -

  • 3

  • 1

  • 無/無

  • 0.76ns

  • 3 V ~ 3.8 V，4.5 V ~ 5.5 V

  • -40°C ~ 85°C

  • 20-SOIC（0.295"，7.50mm 寬）

  • 20-SOIC

  • 管件

  • MC100LVEL92DWGOS

MC100LVEL92DWG相關型號PDF文件下載

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