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MC100LVEL13_06 Datasheet

  • MC100LVEL13_06

  • ON Semiconductor [3.3V ECL Dual 1:3 Fanout Buffer]

  • ONSEMI

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MC100LVEL13
3.3V ECL Dual 1:3 Fanout
Buffer
Description
The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer.
The Low Output鈭扥utput Skew of the device makes it ideal for
distributing two different frequency synchronous signals.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the D input will pull down to V
EE
, The D input will bias
around V
CC
/2 and the Q output will go LOW.
Features
http://onsemi.com
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Pb鈭扚ree Packages are Available*
500 ps Typical Propagation Delays
50 ps Output鈭扥utput Skews
ESD Protection: >2 kV Human Body Model
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: V
CC
= 3.0 V to 3.8 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
=
鈭?.0
V to
鈭?.8
V
Internal Input Pulldown Resistors
Q Output will Default LOW with Inputs Open or at V
EE
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V鈭? @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 143 devices
SO鈭?0 WB
DW SUFFIX
CASE 751D
MARKING DIAGRAM*
20
100LVEL13
AWLYYWWG
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
November, 2006
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Rev. 5
1
Publication Order Number:
MC100LVEL13/D

MC100LVEL13_06 PDF文件相關(guān)型號

MC100LVEL13DWG,MC100LVEL13DWR2

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