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MC100EL33DR2G Datasheet

  • MC100EL33DR2G

  • ON Semiconductor [5V ECL ±4 Divider]

  • ONSEMI

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MC10EL33, MC100EL33
5V ECL
梅4
Divider
Description
The MC10EL/100EL33 is an integrated
梅4
divider. The differential
clock inputs and the V
BB
allow a differential, single-ended or AC coupled
interface to the device. The V
BB
pin, an internally generated voltage
supply, is available to this device only. For single-ended input conditions,
the unused differential input is connected to V
BB
as a switching reference
voltage. V
BB
may also rebias AC coupled inputs. When used, decouple
V
BB
and V
CC
via a 0.01
mF
capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
The reset pin is asynchronous and is asserted on the rising edge. Upon
power-up, the internal flip-flops will attain a random state; the reset allows
for the synchronization of multiple EL33鈥檚 in a system.
The 100 Series contains temperature compensation.
Features
http://onsemi.com
MARKING
DIAGRAMS*
8
1
SOIC鈭?
D SUFFIX
CASE 751
8
1
TSSOP鈭?
DT SUFFIX
CASE 948R
8
HEL33
ALYW
G
1
1
8
KEL33
ALYW
G
鈥?/div>
650 ps Propagation Delay
鈥?/div>
4.0 GHz Toggle Frequency
鈥?/div>
ESD Protection: Human Body Model; > 1 kV,
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Machine Model; > 100 V
PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 V with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V with V
EE
=
鈭?.2
V to
鈭?.7
V
Internal Input Pulldown Resistors on CLK(s) and R.
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V鈭? @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 95 devices
Pb鈭扚ree Packages are Available
8
HL33
ALYWG
G
8
KL33
ALYWG
G
1
1
4V M
G
G
1
DFN8
MN SUFFIX
CASE 506AA
H = MC10
K = MC100
4V = MC10
2K = MC100
A = Assembly Location
L
Y
W
M
G
4
1
Reset
CLK
CLK
1
2
3
R
梅4
8
7
6
V
CC
Q
Q
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
V
BB
4
5
V
EE
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Figure 1. Logic Diagram and Pinout Assignment
漏
Semiconductor Components Industries, LLC, 2006
December, 2006
鈭?/div>
Rev. 9
1
Publication Order Number:
MC10EL33/D
2K M
G
G
4

MC100EL33DR2G PDF文件相關(guān)型號

MC10EL33_06,MC10EL33DG,MC10EL33DTR2,MC10EL33MNR4

MC100EL33DR2G 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 -計數(shù)器，除法器

  • 100EL

  • 除以 4

  • -

  • 1

  • 1

  • 異步

  • -

  • 4.2GHz

  • 正，負(fù)

  • 4.2 V ~ 5.7 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 8-SOIC（0.154"，3.90mm 寬）

  • 8-SOICN

  • 帶卷 (TR)

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