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MC100E167FNR2 Datasheet

  • MC100E167FNR2

  • ON Semiconductor [5V ECL 6-Bit 2:1 MUX-Register]

  • 128.70KB

  • ONSEMI

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MC10E167, MC100E167
5V ECL 6-Bit 2:1
MUX-Register
Description
The MC10E/100E167 contains six 2:1 multiplexers followed by D
flip-flops with single-ended outputs. Input data are selected by the
Select control, SEL. The selected data are transferred to the flip-flop
outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on
the Master Reset (MR) pin asynchronously forces all Q outputs LOW.
Features
http://onsemi.com
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The 100 Series contains temperature compensation.
1000 MHz Min. Operating Frequency
800 ps Max. Clock to Output
Single-Ended Outputs
Asynchronous Master Resets
Dual Clocks
PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
=
鈭?.2
V to
鈭?.7
V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Charged Device Model; > 2 kV
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
Pb鈭扚ree = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V鈭? @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 323 devices
Pb鈭扚ree Packages are Available*
PLCC鈭?8
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxE167FNG
AWLYYWW
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
November, 2006
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Rev. 8
1
Publication Order Number:
MC10E167/D

MC100E167FNR2 PDF文件相關(guān)型號

MC10E167FNR2,MC10E167FNR2G

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