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MC100E116FNR2G Datasheet

  • MC100E116FNR2G

  • ON Semiconductor [5V ECL Quint Differential Line Receiver]

  • 138.18KB

  • ONSEMI

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MC10E116, MC100E116
5V ECL Quint Differential
Line Receiver
Description
The MC10E/100E116 is a quint differential line receiver with
emitter-follower outputs. For applications which require bandwidths
greater than that of the E116, the E416 device may be of interest.
Active current sources plus a deep collector feature of the MOSAIC
III process provide the receivers with excellent common-mode noise
rejection. Each receiver has a dedicated V
CCO
supply lead, providing
optimum symmetry and stability.
If both inverting and non-inverting inputs are at an equal potential of
>
鈭?.5
V, the receiver does
not
go to a defined state, but rather
current-shares in normal differential amplifier fashion, producing
output voltage levels midway between HIGH and LOW, or the device
may even oscillate.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01
mF
capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
The 100 Series contains temperature compensation.
Features
http://onsemi.com
PLCC鈭?8
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxE116G
AWLYYWW
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500 ps Max. Propagation Delay
V
BB
Supply Output
Dedicated V
CCO
Pin for Each Receiver
PECL Mode Operating Range: V
CC
= 4.2 V to 5.7 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
=
鈭?.2
V to
鈭?.7
V
Output Qs will default low when inputs are < V
CC
鈭?.5
V
Internal Input 50 kW Pulldown Resistors
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Moisture Sensitivity Level:
Pb = 1
Pb鈭扚ree = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V鈭? @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 98 devices
Pb鈭扚ree Packages are Available*
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
November, 2006
鈭?/div>
Rev. 10
1
Publication Order Number:
MC10E116/D

MC100E116FNR2G PDF文件相關型號

MC10E116_06

MC100E116FNR2G 產品屬性

  • 500

  • 集成電路 (IC)

  • 邏輯 - 專用邏輯

  • 100E

  • 差分接收器

  • 4.2 V ~ 5.7 V

  • 5

  • 0°C ~ 85°C

  • 表面貼裝

  • 28-LCC（J 形引線）

  • 28-PLCC（11.51x11.51）

  • 帶卷 (TR)

MC100E116FNR2G相關型號PDF文件下載

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