19-2752; Rev 0; 2/03
Quad LVDS Receiver with Hysteresis
General Description
The MAX9179 is a quad low-voltage differential
signaling (LVDS) line receiver designed for applications
requiring high data rates, low power dissipation, and
noise immunity. The receiver accepts four LVDS input
signals and translates them to 3.3V LVCMOS output lev-
els at speeds up to 400Mbps. The receiver features
built-in hysteresis, which improves noise immunity and
prevents multiple switching on slow transitioning inputs.
The device supports a wide 0.038V to 2.362V common-
mode input voltage range, allowing for ground potential
differences and common-mode noise between the driver
and the receiver. A fail-safe circuit sets the output high
when the input is open, undriven and shorted, or undriven
and terminated. Common enable inputs control the high-
impedance outputs.
The MAX9179 has a flow-through pinout for easy PC
board layout, and is pin compatible with the MAX9121
and the DS90LV048A with the additional features of
high ESD tolerance and built-in hysteresis.
The MAX9179 operates from a single 3.3V supply, and is
specified for operation from -40擄C to +85擄C. The device
is offered in 16-pin TSSOP and thin QFN packages.
o
Guaranteed 400Mbps Data Rate
o
50mV (typ) Hysteresis
o
Overshoot/Undershoot Protection (-1.0V or V
CC
+
1.0V) on Enables
o
IEC61000-4-2 Level 4 ESD Tolerance
o
AC Specifications Guaranteed with |V
ID
|
=
100mV
o
Single 3.3V Supply
o
Fail-Safe Circuit
o
Flow-Through Pinout
Simplifies PC Board Layout
Reduces Crosstalk
o
Low-Power CMOS Design
o
Conforms to ANSI TIA/EIA-644 LVDS Standard
o
High-Impedance Inputs when Powered Off
o
Pin Compatible with the MAX9121 and the
DS90LV048A
o
Small Thin QFN Package Available
Features
MAX9179
Applications
Laser Printers
Digital Copiers
Cell-Phone Base Stations
Telecom Switching Equipment
LCD Displays
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Ordering Information
PART
MAX9179EUE
MAX9179ETE*
TEMP RANGE
-40擄C to +85擄C
-40擄C to +85擄C
PIN-PACKAGE
16 TSSOP
16 Thin QFN-EP**
*Future
product鈥攃ontact factory for availability.
**EP
= Exposed paddle.
Functional Diagram appears at end of data sheet.
Pin Configurations
TOP VIEW
IN1- 1
IN1+ 2
IN2+ 3
IN2- 4
IN3- 5
IN3+ 6
IN4+ 7
IN4- 8
16 EN
IN2+ 1
15 OUT1
14 OUT2
IN2- 2
11 V
CC
12 OUT2
IN1+
16
IN1-
15
EN
14
OUT1
13
MAX9179
IN3- 3
EXPOSED PAD
IN3+ 4
5
IN4+
6
IN4-
7
EN
8
OUT4
9 OUT3
10 GND
MAX9179
13 V
CC
12 GND
11 OUT3
10 OUT4
9
EN
THIN QFN
(LEADS UNDER PACKAGE)
TSSOP
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim鈥檚 website at www.maxim-ic.com.
1
2
3
4
5
6
7
8
9
10
11
