19-1554; Rev 1; 10/01
MAX3890 Evaluation Kit
General Description
The MAX3890 evaluation kit (EV kit) is an assembled
surface-mount demonstration board that provides easy
evaluation of the MAX3890 2.5Gbps 16:1 serializer with
clock synthesis and low-voltage differential signal
(LVDS) inputs.
o
+3.3V Single Supply
o
Selectable Reference Clock Frequencies
(155.52MHz, 77.76MHz, 51.84MHz, 38.88MHz)
o
Fully Assembled and Tested Surface-Mount Board
Features
Evaluates: MAX3890
Component List
DESIGNATION
QTY
DESCRIPTION
0.1碌F 鹵10%, 25V min ceramic
capacitors
0.33碌F 鹵10%, 16V min, X7R type
ceramic capacitor
Not installed
33碌F capacitor
Sprague 593D336X9020D
SMA connectors (edge mount)
SMB connectors (PC mount)
SMA connectors (PC mount)
Test points
2-pin headers
56nH inductors
Coilcraft 0805CS-560XKBC
10k鈩?鹵5% resistor
27鈩?鹵5% resistors
24鈩?鹵5% resistors
220鈩?鹵5% resistors
130鈩?鹵5% resistors
4.99k鈩?鹵1% resistors
20k鈩?鹵5% resistor
MAX3890 (64-pin TQFP-EP)
MAX3890 PC board
MAX3890 data sheet
Shunts for JU1鈥揓U3
C1鈥揅6, C10, C11,
11
C13, C14, C15
C7
C8, C9, R1, R2,
R23, JU6鈥揓U9
C12
J1鈥揓6
J7鈥揓22, J24鈥揓43
J44, J45
J46, J47
JU1鈥揓U5
L1鈥揕4
R3
R4, R8,
R12, R16
R5, R9,
R13, R17
R6, R10,
R14, R18
R7, R11,
R15, R19
R20, R21
R22
U1
None
None
None
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0
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6
36
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2
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4
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4
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1
1
1
1
3
Ordering Information
PART
MAX3890EVKIT
*Exposed
Pad
TEMP RANGE
-40擄C to +85擄C
IC PACKAGE
64 TQFP-EP*
Component Suppliers
SUPPLIER
Coilcraft
Sprague
PHONE
847-639-6400
207-324-4140
FAX
847-639-1469
603-224-1430
Note:
Please indicate that you are using the MAX3890 when
contacting these suppliers.
Detailed Description
The MAX3890 EV kit simplifies evaluation of the
MAX3890. The EV kit operates from a +3.3V single sup-
ply and includes all the external components neces-
sary to interface with LVDS inputs and 3.3V positive-
referenced emitter-coupled logic (PECL) outputs.
The LVDS inputs (PDI_+, PDI_-, PCLKI+, PCLKI-,
RCLK+, RCLK-)** are internally terminated with 100鈩?dif-
ferential input resistance and therefore do not require
external termination. Ensure that LVDS devices driving
these inputs are not redundantly terminated. The LVDS
outputs (PCLKO+, PCLKO-) require a differential termi-
nation with a 100鈩?resistor between complementary out-
puts. Do not terminate these outputs to ground.
Layout Considerations
The PECL outputs have voltage attenuation (0.46) and
impedance matching networks on the EV board that
allow 50鈩?terminations to ground for oscilloscope inter-
facing. All signal inputs and outputs use coupled 50鈩?/div>
transmission lines. All input signal lines are of equal
length to minimize propagation-delay skew. Likewise,
all output signal lines are of equal length.
**Note:
PCLKO鹵, PCLKI鹵, RCLK鹵, and SCLK鹵 are labeled as
PCKO鹵, PCKI鹵, RCK鹵, and SCK鹵 on PC board.
________________________________________________________________
Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim鈥檚 website at www.maxim-ic.com.
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