19-1427; Rev 0; 1/99
MAX3690 Evaluation Kit
General Description
The MAX3690 evaluation kit (EV kit) is an assembled
surface-mount demonstration board that provides easy
evaluation of the MAX3690 622Mbps serializer with TTL
input, clock synthesis, and differential PECL output.
____________________________Features
o
+3.3V Single Supply
o
77.76MHz Overhead Generation Clock Reference
Frequency
o
Selectable Input Clock Reference Frequencies
77.76MHz
51.84MHz
38.88MHz
o
Fully Assembled and Tested Surface-Mount Board
Evaluates: MAX3690
Component List
DESIGNATION QTY
C4鈥揅12,
C16鈥揅21
C13, C22
C14
C15*
C2, C3, R2, R11,
JU1, JU2, JU4
L1鈥揕5*
R3, R4
R5, R6
R7, R8
R9, R10
R12
PCLKI,
PD0鈥揚(yáng)D7,
PCLKO
RCLK, SD+, SD-
15
2
1
1
0
5
2
2
2
2
1
10
DESCRIPTION
0.1碌F, 25V min, 10% ceramic
capacitors (0603)
1碌F, 10V min, 10% ceramic
capacitors (0805) X7R
1碌F, 25V min, 10% ceramic
capacitor (0805)
33碌F 鹵10%, 10V min tantalum cap
AVX TAJD336K010
Do not install
56nH inductors
Coilcraft 0805CS-560XKBC
27鈩? 5% resistors (0603)
220鈩? 5% resistors (0603)
130鈩? 5% resistors (0603)
24鈩? 5% resistors (0603)
20k鈩? 5% resistor (0603)
SMB connectors (PC mount)
Suhner 82 SMB-50-0-1/111
SMA connectors (PC mount)
E.F. Johnson 142-0701-206 or
Digi-Key J495-ND
Test points
Mouser 151-203
2x2 pin header (0.1" centers)
Digi-Key S2012-36-ND
Shunt
Digi-Key S9000-ND
MAX3690ECJ (32 TQFP)
MAX3690 EV kit circuit board, Rev. B
MAX3690 data sheet*
Ordering Information
PART
MAX3690EVKIT
TEMP. RANGE
-40擄C to +85擄C
IC PACKAGE
32 TQFP
Component Suppliers
SUPPLIER
Coilcraft
Sprague
PHONE
847-639-6400
603-224-1961
FAX
847-639-1469
603-224-1430
Note:
Please indicate that you are using the MAX3690 when
contacting these component suppliers.
Detailed Description
The MAX3690 EV kit simplifies evaluation of the
MAX3690ECJ. The EV kit operates from a single +3.3V
supply and includes all the external components neces-
sary to interface with TTL inputs and 3.3V PECL outputs.
PD_, PCLKI
These TTL inputs are high impedance, with a range of
0 to V
CC
(+3.3V) with respect to ground. All input signal
lines are of equal length to minimize propagation-delay
skew.
3
RCLK
See Table 1 for changing reference clock rates. In nor-
mal operation with a high-impedance TTL reference
source, RCLK should be driven like PCLKI with R2
open and C2 shorted. If RCLK is driven by a 50鈩?TTL
source, R2 should be 50鈩? JU1 should be shorted, and
C2 should be shorted. If a non-TTL source is used for
RCLK, C2 = 0.1碌F (ensure trace under C2 is cut) and
V
CC
/ 2 should be applied to the stub on the non-
ground side of JU1.
Important:
Note that the output of
the reference clock generator must swing at least 1.2V
peak to peak.
V
CC
, GND
JU3
None
U1*
None
None
2
1
1
1
1
1
*
Supplied by Maxim.
PCLKO
PCLKO is designed to drive a high-impedance TTL
input. To drive other I/O standards, a converter on this
output is recommended. The PCLKO output is sensitive
to capacitance loading (see MAX3690 data sheet for
specified capacitance loading).
1
________________________________________________________________
Maxim Integrated Products
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
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