DRAM MODULE
M372F320(8)0DJ3-C
M372F320(8)0DJ3-C EDO Mode
32M x 72 DRAM DIMM with ECC Using 16Mx4, 4K & 8K Refresh, 3.3V
GENERAL DESCRIPTION
The Samsung M372F320(8)0DJ3-C is a 32Mx72bits Dynamic
RAM high density memory module. The Samsung
M372F320(8)0DJ3-C consists of thirty-six CMOS 16Mx4bits
DRAMs in SOJ 400mil packages and two 16 bits driver IC in
TSSOP package mounted on a 168-pin glass-epoxy sub-
strate. A 0.1 or 0.22uF decoupling capacitor is mounted on
the printed circuit board for each DRAM. The
M372F320(8)0DJ3-C is a Dual In-line Memory Module and is
intended for mounting into 168 pin edge connector sockets.
FEATURES
鈥?Part Identification
Part number
M372F3200DJ3-C
M372F3280DJ3-C
PKG
SOJ
SOJ
Ref.
4K
8K
CBR Ref.
4K/64ms
ROR Ref.
8K/64ms
4K/64ms
鈥?Extended Data Out Mode Operation
鈥?CAS-before-RAS Refresh capability
鈥?RAS-only and Hidden refresh capability
鈥?LVTTL compatible inputs and outputs
鈥?Single 3.3V鹵0.3V power supply
PERFORMANCE RANGE
Speed
-C50
-C60
t
RAC
50ns
60ns
t
CAC
18ns
20ns
t
RC
84ns
104ns
t
HPC
20ns
25ns
鈥?JEDEC standard pinout & Buffered PDpin
鈥?Buffered input except RAS and DQ
鈥?PCB : Height(1650mil), double sided component
PIN CONFIGURATIONS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front Pin Front Pin Front Pin
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
DQ8
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
CC
DQ14
DQ15
DQ16
DQ17
V
SS
RSVD
RSVD
V
CC
W0
CAS0
29 *CAS2 57
30 RAS0 58
31 OE0 59
32
V
SS
60
33
A0
61
34
A2
62
35
A4
63
36
A6
64
37
A8
65
38
A10
66
39
A12
67
40
V
CC
68
41 RFU 69
42 RFU 70
43
V
SS
71
44 OE2 72
45 RAS2 73
46 CAS4 74
47 *CAS6 75
48
76
W2
49
77
V
CC
50 RSVD 78
51 RSVD 79
52 DQ18 80
53 DQ19 81
54
82
V
SS
55 DQ20 83
56 DQ21 84
DQ22
DQ23
V
CC
DQ24
RFU
RFU
RFU
RFU
DQ25
DQ26
DQ27
V
SS
DQ28
DQ29
DQ30
DQ31
V
CC
DQ32
DQ33
DQ34
DQ35
V
SS
PD1
PD3
PD5
PD7
ID0
V
CC
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Back
V
SS
DQ36
DQ37
DQ38
DQ39
V
CC
DQ40
DQ41
DQ42
DQ43
DQ44
V
SS
DQ45
DQ46
DQ47
DQ48
DQ49
V
CC
DQ50
DQ51
DQ52
DQ53
V
SS
RSVD
RSVD
V
CC
RFU
CAS1
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
*CAS3
RAS1
RFU
V
SS
A1
A3
A5
A7
A9
A11
*A13
V
CC
RFU
B0
V
SS
RFU
RAS3
CAS5
*CAS7
PDE
V
CC
RSVD
RSVD
DQ54
DQ55
V
SS
DQ56
DQ57
Pin
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Back
DQ58
DQ59
V
CC
DQ60
RFU
RFU
RFU
RFU
DQ61
DQ62
DQ63
V
SS
DQ64
DQ65
DQ66
DQ67
V
CC
DQ68
DQ69
DQ70
DQ71
V
SS
PD2
PD4
PD6
PD8
ID1
V
CC
PIN NAMES
Pin Names
A0, B0, A1 - A11
A0, B0, A1 - A12
DQ0 - DQ71
W0, W2
OE0, OE2
RAS0 - RAS3
CAS0, 1,4,5
V
CC
V
SS
NC
PDE
PD1 - 8
ID0 - 1
RSVD
RFU
Function
Address Input(4K ref.)
Address Input(8K ref.)
Data In/Out
Read/Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power(+3.3V)
Ground
No Connection
Presence Detect Enable
Presence Detect
ID bit
Reserved Use
Reserved for Future Use
Pins marked
鈥?/div>
*
鈥?/div>
are not used in this module.
PD & ID Table
Pin
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
ID0
ID1
50NS
1
0
0
0
1
0
0
0
0
0
60NS
1
0
0
0
1
1
1
0
0
0
NOTE : A12 is used for only M372F3280DJ3-C (8K Ref.)
PD Note :PD & ID Terminals must each be pulled up through a register to V
CC
at the next higher
level assembly. PDs will be either open (NC) or driven to V
SS
via on-board buffer circuits.
PD : 0 for Vol of Drive IC & 1 for N.C
ID : 0 for Vss & 1 for N.C
ID Note : IDs will be either open (NC) or connected directly to V
SS
without a buffer.
REV. 0.1 Oct. 2000
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