M36DR432C
M36DR432D
32 Mbit (2Mb x16, Dual Bank, Page) Flash Memory
and 4 Mbit (256K x16) SRAM, Multiple Memory Product
PRELIMINARY DATA
FEATURES SUMMARY
s
SUPPLY VOLTAGE
鈥?V
DDF
= V
DDS
=1.9V to 2.1V
s
s
s
Figure 1. Packages
鈥?V
PPF
= 12V for Fast Program (optional)
ACCESS TIME: 85,100ns
LOW POWER CONSUMPTION
ELECTRONIC SIGNATURE
鈥?Manufacturer Code: 20h
鈥?Top Device Code, M36DR432C: 00A4h
鈥?Bottom Device Code, M36DR432D: 00A5h
FBGA
FLASH MEMORY
s
32 Mbit (2Mb x16) BOOT BLOCK
鈥?Parameter Blocks (Top or Bottom Location)
s
Stacked LFBGA66 (ZA)
8 x 8 ball array
PROGRAMMING TIME
鈥?10碌s typical
鈥?Double Word Programming Option
s
ASYNCRONOUS PAGE MODE READ
鈥?Page width: 4 Word
鈥?Page Mode Access Time: 35ns
s
DUAL BANK OPERATION
鈥?Read within one Bank while Program or
Erase within the other
鈥?No Delay between Read and Write
Operations
s
BLOCK PROTECTION ON ALL BLOCKS
鈥?WPF for Block Locking
COMMON FLASH INTERFACE
鈥?64 bit Security Code
s
SRAM
s
4 Mbit (256K x 16 bit)
s
s
LOW V
DDS
DATA RETENTION: 1V
POWER DOWN FEATURES USING TWO
CHIP ENABLE INPUTS
November 2001
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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