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M3488B1 Datasheet

  • M3488B1

  • 256 x 256 DIGITAL SWITCHING MATRIX

  • 18頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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M3488
256 x 256 DIGITAL SWITCHING MATRIX
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PREL IMINARY DATA
256 INPUT AND 256 OUTPUT CHANNEL
CMOS DIGITAL SWITCHING MATRIX COM-
PATIBLE WITH M088
BUILDING BLOCK DESIGNED FOR LARGE
CAPACITY ELECTRONIC EXCHANGES, SUB-
SYSTEMS AND PABX
NO EXTRA PIN NEEDED FOR NOT-BLOCK-
ING SINGLE STAGE AND HIGHER CAPACITY
SYNTHESIS BLOCKS (512 or 1024 channels)
EUROPEAN TELEPHONE STANDARD COM-
PATIBLE (32 serial channels per frame)
PCM INPUTS AND OUTPUTS MUTUALLY
COMPATIBLE
ACTUAL INPUT-OUTPUT CHANNEL CON-
NECTIONS STORED AND MODIFIED VIA AN
ON CHIP 8-BIT PARALLEL MICROPROCES-
SOR INTERFACE
TYPICAL BIT RATE : 2Mbit/s
TYPICAL SYNCHRONIZATION RATE : 8KHz
(time frame is 125碌s)
5V P0WER SUPPLY
CMOS & TTL INPUT/OUTPUT LEVELS COM-
PATIBLE
HIGH DENSITY ADVANCED 1.2碌m HCMOS3
PROCESS
DIP40
PQFP44
ORDERING NUMBERS:
M3488B1
M3488Q1
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Main instructions controlled by the microproc-
essor interface
CHANNEL CONNECTION/DISCONNECTION
OUTPUT CHANNEL DISCONNECTION
INSERTION OF A BYTE ON A PCM OUTPUT
CHANNEL/DISCONNECTION
TRANSFER TO THE MICROPROCESSOR OF
A SINGLE PCM OUTPUT CHANNEL SAMPLE
TRANSFER TO THE MICROPROCESSOR OF
A SINGLE OUTPUT CHANNEL CONTROL
WORD
TRANSFER TO THE MICROPROCESSOR OF
A SELECTED 0 CHANNEL PCM INPUT DATA
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
O
P
tot
T
stg
T
op
Supply Voltage
Input Voltage
Off State Output Voltage
Current at Digital Outputs
Total Package Power Dissipation
Storage Temperature Range
Operating Temperature Range
Parameter
Test Conditions
-0.3 to 7
-0.3 to V
CC
+0.3
-0.3 to V
CC
+0.3
30
1.5
-65 to 150
0 to 70
Unit
V
V
V
mA
W
擄C
擄C
Stresses above those l isted under 鈥?Absolute Maximum Ratings鈥?may cause permanent damage to the devi ce. This is a stress
rati ngs only and functional operation of the device at these or any other conditions above those indicated in the operating con-
ditions of this specificati on is not implied. Exposure to absolute maximum rating conditions for extended periods may affect devi ce
reliabili ty.
November 1994
1/18
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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