M2201
2-Wires 1 Kbit (x8) Serial EEPROM
TWO WIRE SERIAL INTERFACE
100.000 ERASE/WRITE CYCLES with
100 YEARS DATA RETENTION at 55擄C
SINGLE SUPPLY VOLTAGE:
鈥?4.5V to 5.5V for M2201 version
鈥?2.7V to 5.5V for M2201V version
HARDWARE WRITE CONTROL
100 KBIT TRANSFER RATE
BYTE WRITE
PAGE WRITE (up to 4 BYTES)
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
DESCRIPTION
The M2201 is a simplified 2-wire bus 1 Kbit electri-
cally erasable programmable memory (EEPROM),
organized as 128 x8 bits. It is manufactured in
STMicroelectronics鈥檚 Hi-Endurance Advanced
CMOS technology which guarantees a data reten-
tion of 100 years at 55擄C.
The M2201 is available in Plastic Dual-in-Line,
Plastic Small Outline and Thin Shrink Small Out-
line packages.
The memory is compatible with a two wire serial
interface which uses a bi-directional data bus and
serial clock. Read and write operations are initi-
ated by a START condition generated by the bus
master and ended by a STOP condition.
Address bits and RW bit are defined in one single
byte, instead of two (or three) bytes for the standard
I
2
C protocol.
8
1
PSDIP8 (B)
0.25mm Frame
8
1
SO8 (M)
150mil Width
8
1
TSSOP8 (DW)
169 mil width
Figure 1. Logic Diagram
VCC
SCL
WC
M2201
SDA
Table 1. Signal Names
SDA
SCL
WC
V
CC
V
SS
Serial Data Input/Output
Serial Clock
Write Control
Supply Voltage
Ground
VSS
AI01321
July 1999
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