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LXT6251A Datasheet

  • LXT6251A

  • ATM/SONET MAPPER|CMOS|QFP|208PIN|PLASTIC

  • 855.21KB

  • 76頁

  • ETC

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LXT6251A
21 E1 SDH Mapper
Datasheet
The LXT6251A 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH
signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data,
while the SDH side uses a standard Telecom bus interface. Further processing by the companion
LXT6051 Overhead Terminator chip creates the final STM-0 or STM-1 signal. One mapper
provides complete processing of 21 E1s in STM-0, while three mappers can process 63 E1s in
STM-1.
The LXT6251A is compliant with the latest releases of ITU-T G.703 and G.707. It provides all
the alarm and control features to easily implement the multiplexer specified in ITU-T G.783.
Applications
n
21 or 63 E1 Terminal or ADM SDH
Multiplexer
n
Digital Cross Connect System
n
Digital Loop Carrier Systems (NGDLC)
n
Microwave Radio System
Product Features
n
Maps and Demaps 21 E1 signals between
PDH and SDH networks via VC-12
asynchronous mapping.
n
Multiplexes the 21 VC-12 signals into
seven interleaved TUG-2 structures for
STM-0 or a TUG-3 structure for STM-1
applications.
n
Configurable as a flexible Add/Drop
Multiplexer for up to 21 E1 tributaries, with
each E1 I/O port assignable to any TU time
slot within an AU-3 or TUG-3.
n
Performs VC-12 path overhead processing
for all 21 VC-12s, including V5, J2 Path
Trace, and K4 Enhanced RDI.
n
Records TU pointer alarms (TU-AIS, TU-
LOP), BIP-2 and REI error counts, TIM
and PLM alarms, and all other V5 POH
alarms for all 21 tributaries.
n
NRZ Data and Clock interface for E1
tributary access.
n
Microprocessor/SEMF interface to set
Signal Label, J2 Path Trace, access alarms
and counters
n
Low power CMOS technology with 3.3V
core and 5V I/O, available in PQFP-208
package.
n
IEEE 1149.1 (JTAG) support.
As of January 15, 2001, this document replaces the Level One document
LXT6251 21 E1 SDH Mapper Datasheet.
Order Number: 249300-001
January 2001

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