鈥?/div>
Adaptive matrix
Center mode control (normal, phantom, wide)
4/3 channel logic control
Auto-balance (on/off)
Prologic off mode (bypass and full bypass)
Center trim (0 to 鈥?1 dB in 1-dB steps)
On-chip memory: (8K SRAM)
Variable delay time: 15, 20, 25, 30, 40, or 50 ms (15, 20,
25, or 30 ms for Dolby Prologic surround)
New A/D and D/A converter circuits adopted
On-chip Dolby B noise reduction
On-chip input and output filters
Built-in V
DD
circuit
Surround trim (0 to 鈥?1 dB in 1-dB steps)
Input and output muting functions
Master volume control for the center and surround
channels (0 to 鈥?4 dB in 鈥?-dB steps, 鈥?4 to 鈥?6 dB in
鈥?-dB steps, and muted)
SANYO: QIP80E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
51898RM (OT) No. 5889-1/19