LTCVY Datasheet

IC型號：
LTCVY
PDF描述：
Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown
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240.96KB
PDF頁數(shù)：
16頁
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LTC2355-12/LTC2355-14

Serial 12-Bit/14-Bit, 3.5Msps

Sampling ADCs with Shutdown

FEATURES

鈻?/div>

DESCRIPTIO

3.5Msps Conversion Rate

74.2dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits

Low Power Dissipation: 18mW

3.3V Single Supply Operation

2.5V Internal Bandgap Reference can be Overdriven

3-Wire SPI-Compatible Serial Interface

Sleep (13碌W) Shutdown Mode

Nap (4mW) Shutdown Mode

80dB Common Mode Rejection

0V to 2.5V Unipolar Input Range

Tiny 10-Lead MSOP Package

The LTC

廬

2355-12/LTC2355-14 are 12-bit/14-bit, 3.5Msps

serial ADCs with differential inputs. The devices draw only

5.5mA from a single 3.3V supply and come in a tiny 10-lead

MSOP package. A Sleep shutdown feature further reduces

power consumption to 13碌W. The combination of speed,

low power and tiny package makes the LTC2355-12/

LTC2355-14 suitable for high speed, portable applications.

The 80dB common mode rejection allows users to elimi-

nate ground loops and common mode noise by measuring

signals differentially from the source.

The devices convert 0V to 2.5V unipolar inputs differentially.

The absolute voltage swing for A

IN+

and A

IN鈥?/div>

extends from

ground to the supply voltage.

The serial interface sends out the conversion results during

the 16 clock cycles following a CONV rising edge for

compatibility with standard serial interfaces. If two addi-

tional clock cycles for acquisition time are allowed after the

data stream in between conversions, the full sampling rate

of 3.5Msps can be achieved with a 63MHz clock.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

APPLICATIO S

鈻?/div>

Communications

Data Acquisition Systems

Uninterrupted Power Supplies

Multiphase Motor Control

Multiplexed Data Acquisition

RFID

BLOCK DIAGRA

10碌F 3.3V

鈥?0

LTC2355-14

IN+

IN鈥?/div>

14-BIT LATCH

S&H

14-BIT ADC

SDO

THD, 2nd, 3rd (dB)

鈥?/div>

REF

2.5V

REFERENCE

THREE-

STATE

SERIAL

OUTPUT

PORT

10碌F

TIMING

LOGIC

EXPOSED PAD

CONV

GND

SCK

2355 TA01

THD, 2nd, 3rd and SFDR

vs Input Frequency

鈥?6

鈥?2

鈥?8

鈥?4

鈥?0

鈥?6

鈥?2

鈥?8

鈥?04

鈥?10

0.1

FREQUENCY (MHz)

100

2355 G02

THD

2nd

3rd

2355f

型號

版本

描述

廠商

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LTCVX

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Linear Technology [Serial 12-Bit/14-Bit, 3.5Msps Sampling A...

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LTCVY

英文版

Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown

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LTCVY

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