Dot Matrix LED Unit for Indoor Use LT1560ED(Chip Type)
s
Features
隆No.
of dots : 16!32dots
隆Outline
dimensions : 96!192mm
隆Dot
size : 3.0!3.0mm
隆Dot
pitch : 6.0mm
隆Radiation
color : Yellow-green+Red (dichromatic type)
隆Driving
method : 1/16 duty dynamic drive
LT1560ED
s
Absolute Maximum Ratings
Parameter
Supply voltage for IC
Supply voltage for LED
Input voltage
*1
Turn-on time
Operating temperature
Storage temperature
Power dissipation
*1 V
I
<Vcc at Vcc鈮?
Symbol
V
CC
V
LED
V
I
t
ON
T
opr
T
stg
P
Rating
-0.3 to +5.5
-0.3 to +4.5
-0.3 to V
CC
+0.3
1
-10 to +60
-20 to +70
26
(Ta=25藲C)
s
Electrical Characteristics
Parameter
Supply voltage for IC
Supply voltage for LED
IC current dissipation
*1
LED current dissipation
*1
(V
CC
=5V,V
LED
=4V,Ta=25藲C)
Unit
V
V
V
ms
藲C
藲C
W
Symbol
MIN. TYP. MAX. Unit
V
5.25
5.0
V
CC
4.75
V
4.25
4.0
3.75
V
LED
------
mA
200
150
I
CC
------
A
5.5
4.5
I
LED
------
------
V
3.5
V
IH
Input voltage
------
------
V
1.5
V
IL
碌A(chǔ)
------
------
0.1
I
IH
Input current
------
------
0.12
mA
I
IL
------
------
10
MH
Z
f
CLK
Clock frequency
250 1000
70
Frame frequency
f
FR
H
Z
*1 Under the condition that dichromatic all dots are lit.
s
Optical Characteristics
Parameter
Red
Yellow-green
Viewing angle
Red
Peak emission wavelength
Yellow-green
Luminance
Symbol
L
V
2胃
1
/
2
位p
(V
CC
=5V,V
LED
=4V,Ta=25藲C)
TYP
100
100
120
635
565
Unit
cd/m
藲
nm
2
s
Timing Chart
tsu
CLOCK
R &G
DATA
R &G
DATA(OUT)
t
dD
LATCH
V
D
(n)data ON
th
t
WCLK
V
D
(n+1)th line's data
t
WL
td(L-C)
VD(n+2)th line's data
td(C-L)
s
Terminal Functions
Connector Symbol
Power V
LED
supply V
CC
(CN1) GND
A0 to A3
RDATA
GDATA
Input
signal
(CN2)
LATCH
Function
Supply voltage for LED (+5V)
Supply voltage for IC (+4V)
Ground
Address specification signal for row driver
Serial data input for red (H=ON, L=OFF)
Serial data input for yellow-green (H=ON, L=OFF)
Latch signal of display data. H: Serial data is
converted to parallel data. L: Contents are latched.
t WENA
OFF
V
D
(n+1)data ON
1/f ENA
OFF
ENABLE
ADDRESS
(A0 to A3)
V
D
(n)
td(L-A)
td(E-A)
V
D
(n+1)
td(A-E)
s
Block Diagram
Input/output circuit
331
HC367
OUT
A0
A1
A2
A3
RDATA
GDATA
LATCH
ENABLE
CLOCK
473
ENABLE Controls ON/OFF of LED (H: LED OFF)
CLOCK
GND
A0 to A3
Clock signal for data transmission in the
shift-register. (L隆H: serial data is shifted.)
IN
A0
A1
A2
A3
RDATA
GDATA
LATCH
ENABLE
CLOCK
32BIT
SHIFT-REGISTER, LATCH, DRIVER
AND LUMINANCE ADJUSTMENT CIRCUIT
16!16DOT
!2
DICHROMATIC
LED MATRIX
devices
catalogs, data books, etc. Contact SHARP
62
(Internet)
隆Data
forshown inoptoelectronic/power device is provided for in order to obtain the latest device specification sheets before using any SHARP device.
sharp's
internet.(Address http://www.sharp.co.jp/ecg/)
(Notice)
隆In
the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP
32BIT
SHIFT-REGISTER,
LATCH,
DRIVER
AND LUMINANCE ADJUSTMENT CIRCUIT
Ground for signal
Buffered input signal
Input signal generated through 32-bit shift register
RDATA
or buffer
Input signal generated through 32-bit shift register
Output
signal GDATA or buffer
(CN3) LATCH
Buffered input signal
ENABLE Buffered input signal
Buffered input signal
CLOCK
Ground for signal
GND
Each signal is used as input signal for next unit.
* As for the terminal number, refer to the outline dimensions.
4 TO 16 DECODER
Pch FET DRIVER
1
2
