Dot Matrix LED Unit for Indoor Use LT1550ED(Chip Type)
s
Features
隆No.
of dots : 16!32dots
隆Outline
dimensions : 64.0!128.0mm
隆Dot
size : 3.0!3.0mm
隆Dot
pitch : 4.0mm
隆Radiation
color : Yellow-green+Red(dichromatic type)
隆Driving
method : 1/16 duty dynamic drive
LT1550ED
s
Absolute Maximum Ratings
Parameter
Supply voltage for IC
Supply voltage for LED
Input voltage
Turn-on time
Operating temperature
Storage temperature
Power dissipation
*1 25% or less of lighting
Symbol
V
CC
V
LED
V
1
t
ON
T
opr
T
stg
P
Rating
-0.3 to +5.5
-0.3 to +4.5
-0.3 to Vcc+0.3
1
-10 to +60
*1
-20 to +70
20
(Ta=25藲C)
s
Electrical Characteristics
Parameter
Supply voltage for IC
Supply voltage for LED
IC current dissipation
*1
LED current dissipation
*1
(V
CC
=5V,V
LED
=4V,Ta=25藲C)
Unit
V
V
V
ms
藲C
藲C
W
s
Optical Characteristics
Parameter
Red
Yellow-green
Viewing angle
Red
Peak emission wavelength
Yellow-green
Luminance
Symbol
Lv
2胃
1
/
2
位p
Symbol
MIN. TYP. MAX. Unit
4.75
5.0
V
CC
5.25
V
3.75
4.0
V
LED
4.25
V
------
140
200
I
CC
mA
------
3.8
4.2
I
LED
A
3.5
------
------
V
IH
V
Input voltage
------
------
1.5
V
IL
V
------
------
0.1
碌A(chǔ)
I
IH
Input current
------
------
0.12 mA
I
IL
Clock frequency
------
------
10
f
CLK
MH
Z
70
Frame frequency
250 1 000 H
Z
f
FR
*1 Under the condition that dichromatic all dots are lit.
(V
CC
=5V,V
LED
=4V,Ta=25藲C)
TYP.
120
180
120
635
565
Unit
cd/m
藲
nm
2
s
Timing Chart
tsu
CLOCK
R&G
DATA
R&G
DATA(OUT)
LATCH
V
D
(n) data ON
V
D
(n+1) data
td(C-L)
t
dD
t WL
td(L-C)
t WENA
OFF
V
D
(n+1) data ON
1/ f ENA
ADDRESS
(A0 to A3)
V
D(
n)
td(L-A)
td(E-A)
td(A-E)
V
D(
n+1)
OFF
V
D
(n+2) data
th
t
WCLK
s
Terminal Functions
Connector Symbol
V
LED
Power
supply
V
CC
(CN1)
GND
A0 to A3
RDATA
GDATA
Input
signal
(CN2)
LATCH
ENABLE
CLOCK
GND
A0 to A3
Function
Supply voltage for LED (+4V)
Supply voltage for IC (+5V)
Ground
Address specification signal for row driver
Serial data input for red (H=ON, L=OFF)
Serial data input for yellow-green (H=ON, L=OFF)
Latch signal of display data. H: Serial data is
converted to parallel data. L: Contents are latched.
ENABLE
s
Block Diagram
Input/output circuit
331
HC367
473
OUT
IN
A0
A1
A2
A3
RDATA
GDATA
LATCH
ENABLE
CLOCK
Controls ON/OFF of LED (H: LED OFF)
Clock signal for data transmission in the
shift-register. (L隆H: serial data is shifted.)
A0
A1
A2
A3
RDATA
GDATA
LATCH
ENABLE
CLOCK
16!16DOT!2
DICHROMATIC
LED MATRIX
隆In
the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP
devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
(Internet)
隆Data
for sharp's optoelectronic/power device is provided for internet.(Address http://www.sharp.co.jp/ecg/)
(Notice)
32BIT
SHIFT-REGISTER, LATCH, DRIVER
AND LUMINANCE ADJUSTMENT CIRCUIT
32BIT
SHIFT-REGISTER, LATCH, DRIVER
AND LUMINANCE ADJUSTMENT CIRCUIT
Ground for signal
Buffered input signal
Input signal generated through 32-bit shift register
RDATA
or buffer
Input signal generated through 32-bit shift register
Output
GDATA
signal
or buffer
(CN3)
Buffered input signal
LATCH
ENABLE Buffered input signal
CLOCK Buffered input signal
GND
Ground for signal
Each signal is used as input signal for next unit.
* As for the terminal number, refer to the outline dimensions.
4 TO 16 DECODER
Pch FET DRIVER
16
1
2
