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LPS200 Datasheet

  • LPS200

  • Filtronic Compound Semiconductors [HIGH PERFORMANCE LOW NOI...

  • FILTRONIC

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H
IGH
P
ERFORMANCE
L
OW
N
OISE
PHEMT
鈥?/div>
FEATURES
鈾?/div>
1.0 dB Noise Figure at 18 GHz
鈾?/div>
10 dB Associated Gain at 18 GHz
鈾?/div>
Low DC Power Consumption
LPS200
GATE
BOND
PAD (2X)
SOURCE
BOND
PAD (2x)
DRAIN
BOND
PAD (2X)
DIE SIZE: 12.6X10.2mils (320x260
碌m)
DIE THICKNESS: 3.9 mils (100
碌m)
BONDING PADS: 3.3X2.6 mils (85x65
碌m)
鈥?/div>
DESCRIPTION AND APPLICATIONS
The LPS200 is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)
Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-
write 0.25
m by 200
m Schottky barrier gate. The recessed 鈥渕ushroom鈥?gate structure minimizes
parasitic gate-source and gate resistances. The epitaxial structure and processing have been
optimized for high dynamic range. The LPS200 also features Si
3
N
4
passivation and is available in
various packages.
Typical applications are as low noise devices for both narrowband and broadband amplifiers.
鈥?/div>
ELECTRICAL SPECIFICATIONS @ T
Ambient
= 25擄C
Parameter
Saturated Drain-Source Current
Noise Figure
Associated Gain at minimum NF
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
Pinch-Off Voltage
Thermal Resistivity
frequency=18 GHz
Symbol
I
DSS
NF
G
A
I
MAX
G
M
I
GSO
V
P
JC
Test Conditions
V
DS
= 2 V; V
GS
= 0 V
V
DS
= 2 V; I
DS
= 25% I
DSS
V
DS
= 2 V; I
DS
= 25% I
DSS
V
DS
= 2 V; V
GS
= 1 V
V
DS
= 2 V; V
GS
= 0 V
V
GS
= -5 V
V
DS
= 2 V; I
DS
= 1 mA
-0.25
50
9
Min
15
Typ
25
0.7
10
125
70
1
-0.8
285
10
-1.5
Max
50
1.3
Units
mA
dB
dB
mA
mS
碌A(chǔ)
V
擄C/W
Phone:
(408) 988-1845
Fax:
(408) 970-9950
http://
www.filss.com
Revised:
1/23/01
Email:
sales@filss.com

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