LPR200
DEVICES INCORPORATED
16-bit Multilevel Pipeline Register
LPR200
DEVICES INCORPORATED
16-bit Multilevel Pipeline Register
DESCRIPTION
The
LPR200
is a programmable
multilevel pipeline register. This
device is pin-for-pin compatible with
the IDT73200.
The LPR200 contains eight 16-bit
high-speed pipeline registers which
can be configured as eight independent,
1-level pipelines; four independent,
2-level pipelines; two independent,
4-level pipelines; or as one 8-level
pipeline.
The Instruction pins, I
3-0
, control the
loading of the registers. The registers
can be configured as an eight-stage
delay line with data loaded into A
and shifted sequentially through B, C,
D, E, F, G and H as shown in Table 1.
The Instruction pins may also be set
to prevent any register from changing.
The Select lines, S
2-0
, control an 8-to-1
multiplexer which routes the contents
of any of the registers to the Y output
pins. The independence of the I and S
controls allow simultaneous write and
read operations on different registers.
FEATURES
u
Eight 16-bit High-Speed Pipeline
Registers
u
Programmable Multilevel Register
Configurations
u
u
u
u
Access time of 15 ns
Hold, Shift, and Load Instructions
Replaces IDT73200
52-pin PLCC, J-Lead
LPR200 B
LOCK
D
IAGRAM
C REG
D REG
A REG
B REG
A REG
MUX
B REG
C REG
D REG
MUX
E REG
F REG
OE
G REG
16
MUX
MUX
D
15-0
16
MUX
Y
15-0
H REG*
G REG
E REG
F REG
MUX
MUX
MUX
H REG
3
SEL
2-0
I
3-0
CLK
CEN
4
Pipeline Registers
1
08/16/2000鈥揕DS.P200-C