鈻?/div>
FEATURES
2.7V TO 3.6V SINGLE SUPPLY OPERATION
1.8V COMPATIBLE IOs
I
2
C/SPI DIGITAL OUTPUT INTERFACES
MOTION ACTIVATED INTERRUPT SOURCE
FACTORY TRIMMED DEVICE SENSITIVITY
AND OFFSET
EMBEDDED SELF TEST
HIGH SHOCK SURVIVABILITY
Figure 1. Package
QFN-44
Table 1. Order Codes
Part Number
LIS3L02DQ
Package
QFN-44
2
DESCRIPTION
the X, Y axis and Z axis. The device bandwidth
may be selected accordingly to the application re-
quirements. A self-test capability allows the user to
check the functioning of the system.
The device may be configured to generate an iner-
tial wake-up/interrupt signal when a programma-
ble acceleration threshold is exceeded along one
of the three axis.
The LIS3L02DQ is available in plastic SMD pack-
age and it is specified over a temperature range
extending from -20擄C to +70擄C.
The LIS3L02DQ belongs to a family of products
suitable for a variety of applications:
鈥?Motion activated functions in mobile terminals
鈥?Antitheft systems and Inertial navigation
鈥?Gaming and Virtual Reality input devices
鈥?Vibration Monitoring and Compensation
The LIS3L02DQ is a tri-axis digital output linear
accelerometer that includes a sensing element
and an IC interface able to take the information
from the sensing element and to provide the mea-
sured acceleration signals to the external world
through an I
2
C/SPI serial interface.
The sensing element, capable to detect the accel-
eration, is manufactured using a dedicated pro-
cess called THELMA (Thick Epi-Poly Layer for
Microactuators and Accelerometers) developed
by ST to produce inertial sensors and actuators in
silicon.
The IC interface instead is manufactured using a
CMOS process that allows high level of integration
to design a dedicated circuit which is factory
trimmed to better match the sensing element char-
acteristics.
The LIS3L02DQ is capable of measuring acceler-
ations over a maximum bandwidth of 2.0 KHz for
Figure 2. Block Diagram
S1X
S1Y
S1Z
rot
S2Z
S2Y
S2X
MUX
CHARGE
AMPLIFIER
DE
MUX
危鈭?/div>
Reconstruction
Filter
I2C
CS
SCL/SPC
危鈭?/div>
Reconstruction
Filter
Regs
Array
SDA/SDIO
SDO
SPI
危鈭?/div>
Reconstruction
Filter
VOLTAGE & CURRENT
REFERENCE
TRIMMING CIRCUIT
&
TEST INTERFACE
CLOCK
&
PHASE GENERATOR
CONTROL LOGIC
&
INTERRUPT GEN.
RDY/INT
January 2005
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Rev. 3
1/19
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