鈥?/div>
Packages:
20-pin, 300-mil DIP
26-pin, 300-mil SOJ
28-pin, 8
脳
13 mm
2
TSOP (Type I)
CMOS 1M (256K
脳
4) Dynamic RAM
DESCRIPTION
The LH6V4256 is a 262,144 word
脳
4-bit dynamic
RAM which allows fast page mode access. The
LH6V4256 is fabricated on SHARP鈥檚 advanced CMOS
double-level polysilicon gate technology. With its input
multiplexed and packaged in the standard 20-pin DIP,
26-pin SOJ, or 28-pin TSOP (I) packages, it is easy to
realize memory systems with low power dissipation and
large memory capacity. The LH6V4256 operates on a
single +3.3 V power supply and the built-in biasing
voltage generator circuit.
PIN CONNECTIONS
20-PIN DIP
I/O
1
I/O
2
WE
RAS
NC
A
0
A
1
A
2
A
3
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
SS
I/O
4
I/O
3
CAS
OE
A
8
A
7
A
6
A
5
A
4
6V4256-1
TOP VIEW
Figure 1. Pin Connections for DIP Package
2-14