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LH53517 Datasheet

  • LH53517

  • CMOS 512K (64K x 8) MROM

  • 6頁

  • SHARP

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LH53517
FEATURES
鈥?/div>
65,536 words
脳
8 bit organization
鈥?/div>
Access time: 150 ns (MAX.)
鈥?/div>
Low-power consumption:
Operating: 165 mW (MAX.)
Standby: 550
碌W
(MAX.)
鈥?/div>
Static operation
鈥?/div>
TTL compatible I/O
鈥?/div>
Three-state outputs
鈥?/div>
Single +5 V power supply
鈥?/div>
Mask-programmable OE/OE
鈥?/div>
Packages:
28-pin, 600-mil DIP
28-pin, 450-mil SOP
28-pin, 8
脳
13.4 mm
2
TSOP (Type I)
DESCRIPTION
The LH53517 is a mask-programmable ROM organ-
ized as 65,536
脳
8 bits. It is fabricated using silicon-gate
CMOS process technology.
28-PIN DIP
28-PIN SOP
CMOS 512K (64K
脳
8) MROM
PIN CONNECTIONS
TOP VIEW
A
15
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
D
1
D
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
A
14
A
13
A
8
A
9
A
11
OE/OE
A
10
CE
D
7
D
6
D
5
D
4
D
3
53517-1
Figure 1. Pin Connections for DIP and
SOP Packages
28-PIN TSOP (Type I)
TOP VIEW
OE/OE
A
11
A
9
A
8
A
13
A
14
V
CC
A
15
A
12
A
7
A
6
A
5
A
4
A
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
10
CE
D
7
D
6
D
5
D
4
D
3
GND
D
2
D
1
D
0
A
0
A
1
A
2
NOTE:
Reverse bend available on request.
53517-2
Figure 2. Pin Connections for TSOP Package
1

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